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/ Monster Media 1996 #15 / Monster Media Number 15 (Monster Media)(July 1996).ISO / graphics / gtw95268.zip / GTW95268.EXE / STL00017.DA_ / STL00017.DA
Text File  |  1996-05-01  |  150KB  |  4,346 lines
  1. #
  2. #    $Id: stl00017.da@ 2.7 1996/03/01 12:16:49 kevinw Stable $
  3. #
  4. #    Copyright (C) 1995, Diamond Multimedia Systems.
  5. #
  6. #    File:        stl00017.dat
  7. #
  8. #    Purpose:    This file contains the board and mode information for a
  9. #                Stealth 64 Video VRAM: S3 968, 4MB, IBM 526 175Mhz DAC.
  10. #
  11.  
  12. [Objects]
  13. Draweng32=s3x6832.drw
  14. Dac=ibm525.dac
  15. Cursor=ibm525.cur
  16. PixClk=ibm525.clk
  17. Draweng=s3x68.drw
  18.  
  19. [BoardInfo]
  20. bViewports=1
  21. bNewMMIO=1
  22. bTwoPtLine=1
  23. ValidateBAR=YES
  24. SwapVLA30A25=YES
  25.  
  26. [Desktops]
  27. 2048,1536,8
  28. 2048,768,8
  29. 1600,1200,16
  30. 1600,1200,8
  31. 1280,1024,24
  32. 1280,1024,16
  33. 1280,1024,8
  34. 1152,864,32
  35. 1152,864,24
  36. 1152,864,16
  37. 1152,864,8
  38. 1024,3072,8
  39. 1024,1536,16
  40. 1024,1536,8
  41. 1024,768,32
  42. 1024,768,24
  43. 1024,768,16
  44. 1024,768,8
  45. 800,600,32
  46. 800,600,24
  47. 800,600,16
  48. 800,600,8
  49. 640,480,32
  50. 640,480,24
  51. 640,480,16
  52. 640,480,8
  53.  
  54. [Viewports]
  55. 1600,1200,16,82,66
  56. 1600,1200,16,75,60
  57. 1600,1200,8,82,66
  58. 1600,1200,8,75,60
  59. 1280,1024,24,79,75
  60. 1280,1024,24,76,72
  61. 1280,1024,24,64,60
  62. 1280,1024,16,95,90
  63. 1280,1024,16,79,75
  64. 1280,1024,16,76,72
  65. 1280,1024,16,64,60
  66. 1280,1024,8,95,90
  67. 1280,1024,8,79,75
  68. 1280,1024,8,76,72
  69. 1280,1024,8,64,60
  70. 1152,864,32,64,70
  71. 1152,864,32,56,60
  72. 1152,864,24,64,70
  73. 1152,864,24,56,60
  74. 1152,864,16,82,90
  75. 1152,864,16,71,75
  76. 1152,864,16,64,70
  77. 1152,864,16,56,60
  78. 1152,864,8,82,90
  79. 1152,864,8,71,75
  80. 1152,864,8,64,70
  81. 1152,864,8,56,60
  82. 1024,768,32,64,80
  83. 1024,768,32,60,75
  84. 1024,768,32,58,72
  85. 1024,768,32,56,70
  86. 1024,768,32,48,60
  87. 1024,768,24,64,80
  88. 1024,768,24,60,75
  89. 1024,768,24,58,72
  90. 1024,768,24,56,70
  91. 1024,768,24,48,60
  92. 1024,768,16,96,120
  93. 1024,768,16,81,100
  94. 1024,768,16,64,80
  95. 1024,768,16,60,75
  96. 1024,768,16,58,72
  97. 1024,768,16,56,70
  98. 1024,768,16,48,60
  99. 1024,768,8,96,120
  100. 1024,768,8,81,100
  101. 1024,768,8,64,80
  102. 1024,768,8,60,75
  103. 1024,768,8,58,72
  104. 1024,768,8,56,70
  105. 1024,768,8,48,60
  106. 800,600,32,75,120
  107. 800,600,32,64,100
  108. 800,600,32,56,90
  109. 800,600,32,46,75
  110. 800,600,32,48,72
  111. 800,600,32,37,60
  112. 800,600,32,35,56
  113. 800,600,24,75,120
  114. 800,600,24,64,100
  115. 800,600,24,56,90
  116. 800,600,24,46,75
  117. 800,600,24,48,72
  118. 800,600,24,37,60
  119. 800,600,24,35,56
  120. 800,600,16,75,120
  121. 800,600,16,64,100
  122. 800,600,16,56,90
  123. 800,600,16,46,75
  124. 800,600,16,48,72
  125. 800,600,16,37,60
  126. 800,600,16,35,56
  127. 800,600,8,75,120
  128. 800,600,8,64,100
  129. 800,600,8,56,90
  130. 800,600,8,46,75
  131. 800,600,8,48,72
  132. 800,600,8,37,60
  133. 800,600,8,35,56
  134. 640,480,32,64,120
  135. 640,480,32,52,100
  136. 640,480,32,48,90
  137. 640,480,32,37,75
  138. 640,480,32,37,72
  139. 640,480,32,31,60
  140. 640,480,24,64,120
  141. 640,480,24,52,100
  142. 640,480,24,48,90
  143. 640,480,24,37,75
  144. 640,480,24,37,72
  145. 640,480,24,31,60
  146. 640,480,16,64,120
  147. 640,480,16,52,100
  148. 640,480,16,48,90
  149. 640,480,16,37,75
  150. 640,480,16,37,72
  151. 640,480,16,31,60
  152. 640,480,8,64,120
  153. 640,480,8,52,100
  154. 640,480,8,48,90
  155. 640,480,8,37,75
  156. 640,480,8,37,72
  157. 640,480,8,31,60
  158.  
  159. [TextMode]
  160. CRT, RUN, EXTENDED_BIOS_FLAGS_2, 1
  161. SHELL, I10, 0x0003,  0x0000
  162. CRT, RUN, REG_LOCK_1, 0x48
  163. CRT, RUN, REG_LOCK_2, 0xA5
  164.  
  165. [GraphicsEnable]
  166. CRT, RMW, LAW_CONTROL, 0xEC, 0x13
  167. CRT, RMW, EXT_MEM_CONTROL_1, 0xE4, 0x18
  168.  
  169. [GraphicsDisable]
  170. CRT, RMW, LAW_CONTROL, 0xEC, 0x00
  171. CRT, RMW, EXT_MEM_CONTROL_1, 0xE4, 0x00
  172.  
  173. [2048,1536,8]
  174. # Setting Line Pitch
  175. CRT,RUN,LOGICAL_LINE_LENGTH,0x00
  176. CRT,RUN,EXT_MODE,0x00
  177. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  178. # Setting Engine Pitch
  179. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x00
  180. CRT,RUN,MEM_CONFIG,0x8f
  181. # Setting Basic Mode Registers.The registers
  182. # below are neither Desktop or Viewport Regs
  183. # Unlock Sequencer
  184. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  185. # Dump Sequencer Registers
  186. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  187. # Dump Graphics Controller Registers
  188. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  189. # Dump Attribute Controller Registers
  190. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  191. # Lock Sequencer
  192. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  193. DAC_IDR, RUN, DAC_OPERATION, 0x02
  194. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  195. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  196. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  197. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  198. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  199. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  200. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  201. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  202. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  203.  
  204. [2048,768,8]
  205. # Setting Line Pitch
  206. CRT,RUN,LOGICAL_LINE_LENGTH,0x00
  207. CRT,RUN,EXT_MODE,0x00
  208. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  209. # Setting Engine Pitch
  210. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x00
  211. CRT,RUN,MEM_CONFIG,0x8f
  212. # Setting Basic Mode Registers.The registers
  213. # below are neither Desktop or Viewport Regs
  214. # Unlock Sequencer
  215. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  216. # Dump Sequencer Registers
  217. SEQ,RUN,CLOCKING_MODE,0x01,0x0f,0x00,0x0e,0x00
  218. # Dump Graphics Controller Registers
  219. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  220. # Dump Attribute Controller Registers
  221. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  222. # Lock Sequencer
  223. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  224. DAC_IDR, RUN, DAC_OPERATION, 0x02
  225. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  226. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  227. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  228. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  229. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  230. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  231. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  232. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  233. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  234.  
  235. [1024,3072,8]
  236. # Setting Line Pitch
  237. CRT,RUN,LOGICAL_LINE_LENGTH,0x80
  238. CRT,RUN,EXT_MODE,0x00
  239. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  240. # Setting Engine Pitch
  241. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x00
  242. CRT,RUN,MEM_CONFIG,0x09
  243. # Setting Basic Mode Registers.The registers
  244. # below are neither Desktop or Viewport Regs
  245. # Unlock Sequencer
  246. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  247. # Dump Sequencer Registers
  248. SEQ,RUN,CLOCKING_MODE,0x01,0x0f,0x00,0x0e,0x00
  249. # Dump Graphics Controller Registers
  250. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  251. # Dump Attribute Controller Registers
  252. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  253. # Lock Sequencer
  254. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  255. DAC_IDR, RUN, DAC_OPERATION, 0x02
  256. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  257. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  258. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  259. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  260. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  261. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  262. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  263. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  264. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  265.  
  266. [1024,1536,8]
  267. # Setting Line Pitch
  268. CRT,RUN,LOGICAL_LINE_LENGTH,0x80
  269. CRT,RUN,EXT_MODE,0x00
  270. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  271. # Setting Engine Pitch
  272. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x00
  273. CRT,RUN,MEM_CONFIG,0x09
  274. # Setting Basic Mode Registers.The registers
  275. # below are neither Desktop or Viewport Regs
  276. # Unlock Sequencer
  277. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  278. # Dump Sequencer Registers
  279. SEQ,RUN,CLOCKING_MODE,0x01,0x0f,0x00,0x0e,0x00
  280. # Dump Graphics Controller Registers
  281. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  282. # Dump Attribute Controller Registers
  283. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  284. # Lock Sequencer
  285. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  286. DAC_IDR, RUN, DAC_OPERATION, 0x02
  287. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  288. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  289. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  290. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  291. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  292. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  293. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  294. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  295. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  296.  
  297. [1024,1536,16]
  298. # Setting Line Pitch
  299. CRT,RUN,LOGICAL_LINE_LENGTH,0x00
  300. CRT,RUN,EXT_MODE,0x00
  301. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  302. # Setting Engine Pitch
  303. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x10
  304. CRT,RUN,MEM_CONFIG,0x89
  305. # Setting Basic Mode Registers.The registers
  306. # below are neither Desktop or Viewport Regs
  307. # Unlock Sequencer
  308. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  309. # Dump Sequencer Registers
  310. SEQ,RUN,CLOCKING_MODE,0x01,0x0f,0x00,0x0e,0x00
  311. # Dump Graphics Controller Registers
  312. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  313. # Dump Attribute Controller Registers
  314. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  315. # Lock Sequencer
  316. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  317. DAC_IDR, RUN, DAC_OPERATION, 0x02
  318. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  319. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  320. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  321. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  322. DAC_IDR, RUN, PIXEL_FORMAT, 0x04
  323. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  324. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  325. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  326. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  327.  
  328. [1600,1200,16]
  329. # Setting Line Pitch
  330. CRT,RUN,LOGICAL_LINE_LENGTH,0x90
  331. CRT,RUN,EXT_MODE,0x00
  332. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  333. # Setting Engine Pitch
  334. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x91
  335. CRT,RUN,MEM_CONFIG,0x8b
  336. # Setting Basic Mode Registers.The registers
  337. # below are neither Desktop or Viewport Regs
  338. # Unlock Sequencer
  339. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  340. # Dump Sequencer Registers
  341. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  342. # Dump Graphics Controller Registers
  343. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  344. # Dump Attribute Controller Registers
  345. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  346. # Lock Sequencer
  347. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  348. DAC_IDR, RUN, DAC_OPERATION, 0x02
  349. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  350. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  351. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  352. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  353. DAC_IDR, RUN, PIXEL_FORMAT, 0x04
  354. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  355. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  356. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  357. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  358.  
  359. [1600,1200,8]
  360. # Setting Line Pitch
  361. CRT,RUN,LOGICAL_LINE_LENGTH,0xc8
  362. CRT,RUN,EXT_MODE,0x00
  363. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  364. # Setting Engine Pitch
  365. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x81
  366. CRT,RUN,MEM_CONFIG,0x8b
  367. # Setting Basic Mode Registers.The registers
  368. # below are neither Desktop or Viewport Regs
  369. # Unlock Sequencer
  370. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  371. # Dump Sequencer Registers
  372. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  373. # Dump Graphics Controller Registers
  374. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  375. # Dump Attribute Controller Registers
  376. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  377. # Lock Sequencer
  378. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  379. DAC_IDR, RUN, DAC_OPERATION, 0x02
  380. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  381. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  382. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  383. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  384. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  385. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  386. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  387. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  388. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  389.  
  390. [1280,1024,24]
  391. # Setting Line Pitch
  392. CRT,RUN,LOGICAL_LINE_LENGTH,0xe0
  393. CRT,RUN,EXT_MODE,0x00
  394. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  395. # Setting Engine Pitch
  396. CRT,RUN,EXT_SYSTEM_CONTROL_1,0xe0
  397. CRT,RUN,MEM_CONFIG,0x8b
  398. # Setting Basic Mode Registers.The registers
  399. # below are neither Desktop or Viewport Regs
  400. # Unlock Sequencer
  401. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  402. # Dump Sequencer Registers
  403. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  404. # Dump Graphics Controller Registers
  405. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  406. # Dump Attribute Controller Registers
  407. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  408. # Lock Sequencer
  409. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  410. DAC_IDR, RUN, DAC_OPERATION, 0x02
  411. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  412. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  413. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  414. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  415. DAC_IDR, RUN, PIXEL_FORMAT, 0x05
  416. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  417. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0x00
  418. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x01
  419. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x00
  420.  
  421. [1280,1024,16]
  422. # Setting Line Pitch
  423. CRT,RUN,LOGICAL_LINE_LENGTH,0x40
  424. CRT,RUN,EXT_MODE,0x00
  425. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  426. # Setting Engine Pitch
  427. CRT,RUN,EXT_SYSTEM_CONTROL_1,0xd0
  428. CRT,RUN,MEM_CONFIG,0x8b
  429. # Setting Basic Mode Registers.The registers
  430. # below are neither Desktop or Viewport Regs
  431. # Unlock Sequencer
  432. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  433. # Dump Sequencer Registers
  434. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  435. # Dump Graphics Controller Registers
  436. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  437. # Dump Attribute Controller Registers
  438. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  439. # Lock Sequencer
  440. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  441. DAC_IDR, RUN, DAC_OPERATION, 0x02
  442. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  443. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  444. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  445. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  446. DAC_IDR, RUN, PIXEL_FORMAT, 0x04
  447. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  448. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  449. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  450. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  451.  
  452. [1280,1024,8]
  453. # Setting Line Pitch
  454. CRT,RUN,LOGICAL_LINE_LENGTH,0xa0
  455. CRT,RUN,EXT_MODE,0x00
  456. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  457. # Setting Engine Pitch
  458. CRT,RUN,EXT_SYSTEM_CONTROL_1,0xc0
  459. CRT,RUN,MEM_CONFIG,0x0b
  460. # Setting Basic Mode Registers.The registers
  461. # below are neither Desktop or Viewport Regs
  462. # Unlock Sequencer
  463. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  464. # Dump Sequencer Registers
  465. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  466. # Dump Graphics Controller Registers
  467. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  468. # Dump Attribute Controller Registers
  469. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  470. # Lock Sequencer
  471. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  472. DAC_IDR, RUN, DAC_OPERATION, 0x02
  473. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  474. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  475. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  476. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  477. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  478. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  479. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  480. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  481. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  482.  
  483. [1152,864,32]
  484. CRT,RUN,LOGICAL_LINE_LENGTH,0x40
  485. CRT,RUN,EXT_MODE,0x00
  486. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x20
  487. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x31
  488. CRT,RUN,MEM_CONFIG,0x89
  489. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  490. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  491. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  492. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  493. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  494. DAC_IDR, RUN, DAC_OPERATION, 0x02
  495. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  496. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  497. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  498. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  499. DAC_IDR, RUN, PIXEL_FORMAT, 0x06
  500. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  501. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0x00
  502. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  503. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  504.  
  505. [1152,864,24]
  506. # Setting Line Pitch
  507. CRT,RUN,LOGICAL_LINE_LENGTH,0xb0
  508. CRT,RUN,EXT_MODE,0x00
  509. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  510. # Setting Engine Pitch
  511. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x21
  512. CRT,RUN,MEM_CONFIG,0x8b
  513. # Setting Basic Mode Registers.The registers
  514. # below are neither Desktop or Viewport Regs
  515. # Unlock Sequencer
  516. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  517. # Dump Sequencer Registers
  518. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  519. # Dump Graphics Controller Registers
  520. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  521. # Dump Attribute Controller Registers
  522. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  523. # Lock Sequencer
  524. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  525. DAC_IDR, RUN, DAC_OPERATION, 0x02
  526. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  527. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  528. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  529. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  530. DAC_IDR, RUN, PIXEL_FORMAT, 0x05
  531. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  532. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0x00
  533. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x01
  534. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x00
  535.  
  536. [1152,864,16]
  537. # Setting Line Pitch
  538. CRT,RUN,LOGICAL_LINE_LENGTH,0x20
  539. CRT,RUN,EXT_MODE,0x00
  540. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  541. # Setting Engine Pitch
  542. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x11
  543. CRT,RUN,MEM_CONFIG,0x8b
  544. # Setting Basic Mode Registers.The registers
  545. # below are neither Desktop or Viewport Regs
  546. # Unlock Sequencer
  547. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  548. # Dump Sequencer Registers
  549. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  550. # Dump Graphics Controller Registers
  551. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  552. # Dump Attribute Controller Registers
  553. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  554. # Lock Sequencer
  555. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  556. DAC_IDR, RUN, DAC_OPERATION, 0x02
  557. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  558. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  559. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  560. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  561. DAC_IDR, RUN, PIXEL_FORMAT, 0x04
  562. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  563. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  564. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  565. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  566.  
  567. [1152,864,8]
  568. # Setting Line Pitch
  569. CRT,RUN,LOGICAL_LINE_LENGTH,0x90
  570. CRT,RUN,EXT_MODE,0x00
  571. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  572. # Setting Engine Pitch
  573. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x01
  574. CRT,RUN,MEM_CONFIG,0x89
  575. # Setting Basic Mode Registers.The registers
  576. # below are neither Desktop or Viewport Regs
  577. # Unlock Sequencer
  578. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  579. # Dump Sequencer Registers
  580. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  581. # Dump Graphics Controller Registers
  582. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  583. # Dump Attribute Controller Registers
  584. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  585. # Lock Sequencer
  586. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  587. DAC_IDR, RUN, DAC_OPERATION, 0x02
  588. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  589. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  590. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  591. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  592. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  593. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  594. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  595. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  596. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  597.  
  598. [1024,768,32]
  599. CRT,RUN,LOGICAL_LINE_LENGTH,0x00
  600. CRT,RUN,EXT_MODE,0x00
  601. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x20
  602. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x30
  603. CRT,RUN,MEM_CONFIG,0x89
  604. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  605. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  606. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  607. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  608. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  609. DAC_IDR, RUN, DAC_OPERATION, 0x02
  610. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  611. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  612. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  613. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  614. DAC_IDR, RUN, PIXEL_FORMAT, 0x06
  615. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  616. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  617. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  618. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  619.  
  620. [1024,768,24]
  621. # Setting Line Pitch
  622. CRT,RUN,LOGICAL_LINE_LENGTH,0x80
  623. CRT,RUN,EXT_MODE,0x00
  624. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  625. # Setting Engine Pitch
  626. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x20
  627. CRT,RUN,MEM_CONFIG,0x89
  628. # Setting Basic Mode Registers.The registers
  629. # below are neither Desktop or Viewport Regs
  630. # Unlock Sequencer
  631. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  632. # Dump Sequencer Registers
  633. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  634. # Dump Graphics Controller Registers
  635. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  636. # Dump Attribute Controller Registers
  637. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  638. # Lock Sequencer
  639. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  640. DAC_IDR, RUN, DAC_OPERATION, 0x02
  641. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  642. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  643. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  644. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  645. DAC_IDR, RUN, PIXEL_FORMAT, 0x05
  646. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  647. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0x00
  648. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x01
  649. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x00
  650.  
  651. [1024,768,16]
  652. # Setting Line Pitch
  653. CRT,RUN,LOGICAL_LINE_LENGTH,0x00
  654. CRT,RUN,EXT_MODE,0x00
  655. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  656. # Setting Engine Pitch
  657. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x10
  658. CRT,RUN,MEM_CONFIG,0x89
  659. # Setting Basic Mode Registers.The registers
  660. # below are neither Desktop or Viewport Regs
  661. # Unlock Sequencer
  662. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  663. # Dump Sequencer Registers
  664. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  665. # Dump Graphics Controller Registers
  666. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  667. # Dump Attribute Controller Registers
  668. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  669. # Lock Sequencer
  670. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  671. DAC_IDR, RUN, DAC_OPERATION, 0x02
  672. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  673. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  674. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  675. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  676. DAC_IDR, RUN, PIXEL_FORMAT, 0x04
  677. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  678. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  679. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  680. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  681.  
  682. [1024,768,8]
  683. # Setting Line Pitch
  684. CRT,RUN,LOGICAL_LINE_LENGTH,0x80
  685. CRT,RUN,EXT_MODE,0x00
  686. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  687. # Setting Engine Pitch
  688. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x00
  689. CRT,RUN,MEM_CONFIG,0x09
  690. # Setting Basic Mode Registers.The registers
  691. # below are neither Desktop or Viewport Regs
  692. # Unlock Sequencer
  693. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  694. # Dump Sequencer Registers
  695. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  696. # Dump Graphics Controller Registers
  697. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  698. # Dump Attribute Controller Registers
  699. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  700. # Lock Sequencer
  701. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  702. DAC_IDR, RUN, DAC_OPERATION, 0x02
  703. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  704. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  705. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  706. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  707. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  708. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  709. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  710. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  711. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  712.  
  713. [800,600,32]
  714. # Setting Line Pitch
  715. CRT,RUN,LOGICAL_LINE_LENGTH,0x90
  716. CRT,RUN,EXT_MODE,0x00
  717. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  718. # Setting Engine Pitch
  719. CRT,RUN,EXT_SYSTEM_CONTROL_1,0xb0
  720. CRT,RUN,MEM_CONFIG,0x8b
  721. # Setting Basic Mode Registers.The registers
  722. # below are neither Desktop or Viewport Regs
  723. # Unlock Sequencer
  724. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  725. # Dump Sequencer Registers
  726. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  727. # Dump Graphics Controller Registers
  728. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  729. # Dump Attribute Controller Registers
  730. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  731. # Lock Sequencer
  732. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  733. DAC_IDR, RUN, DAC_OPERATION, 0x02
  734. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  735. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  736. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  737. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  738. DAC_IDR, RUN, PIXEL_FORMAT, 0x06
  739. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  740. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  741. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  742. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  743.  
  744. [800,600,24]
  745. # Setting Line Pitch
  746. CRT,RUN,LOGICAL_LINE_LENGTH,0x2c
  747. CRT,RUN,EXT_MODE,0x00
  748. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  749. # Setting Engine Pitch
  750. CRT,RUN,EXT_SYSTEM_CONTROL_1,0xa0
  751. CRT,RUN,MEM_CONFIG,0x8b
  752. # Setting Basic Mode Registers.The registers
  753. # below are neither Desktop or Viewport Regs
  754. # Unlock Sequencer
  755. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  756. # Dump Sequencer Registers
  757. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  758. # Dump Graphics Controller Registers
  759. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  760. # Dump Attribute Controller Registers
  761. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  762. # Lock Sequencer
  763. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  764. DAC_IDR, RUN, DAC_OPERATION, 0x02
  765. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  766. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  767. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  768. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  769. DAC_IDR, RUN, PIXEL_FORMAT, 0x05
  770. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  771. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0x00
  772. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x01
  773. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x00
  774.  
  775. [800,600,16]
  776. # Setting Line Pitch
  777. CRT,RUN,LOGICAL_LINE_LENGTH,0xc8
  778. CRT,RUN,EXT_MODE,0x00
  779. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  780. # Setting Engine Pitch
  781. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x90
  782. CRT,RUN,MEM_CONFIG,0x8b
  783. # Setting Basic Mode Registers.The registers
  784. # below are neither Desktop or Viewport Regs
  785. # Unlock Sequencer
  786. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  787. # Dump Sequencer Registers
  788. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  789. # Dump Graphics Controller Registers
  790. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  791. # Dump Attribute Controller Registers
  792. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  793. # Lock Sequencer
  794. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  795. DAC_IDR, RUN, DAC_OPERATION, 0x02
  796. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  797. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  798. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  799. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  800. DAC_IDR, RUN, PIXEL_FORMAT, 0x04
  801. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  802. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  803. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  804. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  805.  
  806. [800,600,8]
  807. # Setting Line Pitch
  808. CRT,RUN,LOGICAL_LINE_LENGTH,0x64
  809. CRT,RUN,EXT_MODE,0x00
  810. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  811. # Setting Engine Pitch
  812. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x80
  813. CRT,RUN,MEM_CONFIG,0x8b
  814. # Setting Basic Mode Registers.The registers
  815. # below are neither Desktop or Viewport Regs
  816. # Unlock Sequencer
  817. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  818. # Dump Sequencer Registers
  819. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  820. # Dump Graphics Controller Registers
  821. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  822. # Dump Attribute Controller Registers
  823. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  824. # Lock Sequencer
  825. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  826. DAC_IDR, RUN, DAC_OPERATION, 0x02
  827. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  828. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  829. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  830. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  831. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  832. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  833. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  834. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  835. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  836.  
  837. [640,480,32]
  838. # Setting Line Pitch
  839. CRT,RUN,LOGICAL_LINE_LENGTH,0x40
  840. CRT,RUN,EXT_MODE,0x00
  841. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  842. # Setting Engine Pitch
  843. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x70
  844. CRT,RUN,MEM_CONFIG,0x8b
  845. # Setting Basic Mode Registers.The registers
  846. # below are neither Desktop or Viewport Regs
  847. # Unlock Sequencer
  848. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  849. # Dump Sequencer Registers
  850. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  851. # Dump Graphics Controller Registers
  852. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0f,0xff
  853. # Dump Attribute Controller Registers
  854. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,0x41,0x00,0x0f,0x00,0x00
  855. # Lock Sequencer
  856. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  857. DAC_IDR, RUN, DAC_OPERATION, 0x02
  858. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  859. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  860. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  861. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  862. DAC_IDR, RUN, PIXEL_FORMAT, 0x06
  863. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  864. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  865. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  866. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  867.  
  868. [640,480,24]
  869. # Setting Line Pitch
  870. CRT,RUN,LOGICAL_LINE_LENGTH,0xf0
  871. CRT,RUN,EXT_MODE,0x00
  872. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  873. # Setting Engine Pitch
  874. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x60
  875. CRT,RUN,MEM_CONFIG,0x8b
  876. # Setting Basic Mode Registers.The registers
  877. # below are neither Desktop or Viewport Regs
  878. # Unlock Sequencer
  879. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  880. # Dump Sequencer Registers
  881. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  882. # Dump Graphics Controller Registers
  883. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  884. # Dump Attribute Controller Registers
  885. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  886. # Lock Sequencer
  887. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  888. DAC_IDR, RUN, DAC_OPERATION, 0x02
  889. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  890. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  891. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  892. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  893. DAC_IDR, RUN, PIXEL_FORMAT, 0x05
  894. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  895. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0x00
  896. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x01
  897. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x00
  898.  
  899. [640,480,16]
  900. # Setting Line Pitch
  901. CRT,RUN,LOGICAL_LINE_LENGTH,0xa0
  902. CRT,RUN,EXT_MODE,0x00
  903. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  904. # Setting Engine Pitch
  905. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x50
  906. CRT,RUN,MEM_CONFIG,0x8b
  907. # Setting Basic Mode Registers.The registers
  908. # below are neither Desktop or Viewport Regs
  909. # Unlock Sequencer
  910. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  911. # Dump Sequencer Registers
  912. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  913. # Dump Graphics Controller Registers
  914. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0f,0xff
  915. # Dump Attribute Controller Registers
  916. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,0x41,0x00,0x0f,0x00,0x00
  917. # Lock Sequencer
  918. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  919. DAC_IDR, RUN, DAC_OPERATION, 0x02
  920. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  921. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  922. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  923. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  924. DAC_IDR, RUN, PIXEL_FORMAT, 0x04
  925. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  926. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  927. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  928. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  929.  
  930. [640,480,8]
  931. # Setting Line Pitch
  932. CRT,RUN,LOGICAL_LINE_LENGTH,0x50
  933. CRT,RUN,EXT_MODE,0x00
  934. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  935. # Setting Engine Pitch
  936. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x40
  937. CRT,RUN,MEM_CONFIG,0x8b
  938. # Setting Basic Mode Registers.The registers
  939. # below are neither Desktop or Viewport Regs
  940. # Unlock Sequencer
  941. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  942. # Dump Sequencer Registers
  943. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  944. # Dump Graphics Controller Registers
  945. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0f,0xff
  946. # Dump Attribute Controller Registers
  947. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,0x41,0x00,0x0f,0x00,0x00
  948. # Lock Sequencer
  949. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  950. DAC_IDR, RUN, DAC_OPERATION, 0x02
  951. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  952. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  953. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  954. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  955. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  956. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  957. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0x00
  958. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  959. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  960.  
  961.  
  962. [1600,1200,16,82,66]
  963. # Unlock CRTC
  964. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  965. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  966. CRT,RUN,REG_LOCK_1,0x48,0xa5
  967. # Dump CRT Controller Registers
  968. CRT,RUN,HORZ_TOTAL,0x7d,0x64,0x62,0x00,0x67,0x11,0xe6,0x00,0x00,0x40
  969. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  970. CRT,RUN,VERT_RETRACE_START,0xaf,0x0b,0xaf
  971. CRT,RUN,UNDERLINE_LOCATION,0x00,0xaf,0x00,0xa3,0xff
  972. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x10,0x00
  973. CRT,RUN,MISC_1,0x15,0x78,0x14,0x11
  974. CRT,RUN,MODE_CONTROL,0x02
  975. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  976. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  977. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  978. CRT,RUN,EXT_VERT_OVERFLOW,0x57
  979. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  980. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  981. CRT,RUN,EXT_MISC_CONTROL_3,0x04
  982. # Lock CRTC Reg 11 for compatibility
  983. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  984. # Dump ENG Register
  985. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  986. # Dump MISCOUT Register
  987. DIR,RUN,MISC_WRITE,0xef
  988. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  989. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  990. CLK_IND, RUN, FREQ_2, 0xd3
  991. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  992. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  993. CRT,RUN,LATCH_DATA, 0x00
  994.  
  995. [1600,1200,16,75,60]
  996. # Unlock CRTC
  997. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  998. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  999. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1000. # Dump CRT Controller Registers
  1001. CRT,RUN,HORZ_TOTAL,0x7f,0x64,0x62,0x02,0x68,0x12,0xe8,0x00,0x00,0x40
  1002. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1003. CRT,RUN,VERT_RETRACE_START,0xaf,0x0b,0xaf
  1004. CRT,RUN,UNDERLINE_LOCATION,0x00,0xaf,0x00,0xa3,0xff
  1005. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x10,0x00
  1006. CRT,RUN,MISC_1,0x15,0x77,0x14,0x11
  1007. CRT,RUN,MODE_CONTROL,0x02
  1008. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1009. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  1010. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1011. CRT,RUN,EXT_VERT_OVERFLOW,0x57
  1012. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1013. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  1014. CRT,RUN,EXT_MISC_CONTROL_3,0x04
  1015. # Lock CRTC Reg 11 for compatibility
  1016. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1017. # Dump ENG Register
  1018. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1019. # Dump MISCOUT Register
  1020. DIR,RUN,MISC_WRITE,0xef
  1021. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1022. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1023. CLK_IND, RUN, FREQ_2, 0xcd
  1024. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1025. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1026. CRT,RUN,LATCH_DATA, 0x00
  1027.  
  1028.  
  1029. [1600,1200,8,82,66]
  1030. # Unlock CRTC
  1031. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1032. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1033. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1034. # Dump CRT Controller Registers
  1035. CRT,RUN,HORZ_TOTAL,0x7d,0x64,0x62,0x00,0x67,0x11,0xe6,0x00,0x00,0x40
  1036. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1037. CRT,RUN,VERT_RETRACE_START,0xaf,0x0b,0xaf
  1038. CRT,RUN,UNDERLINE_LOCATION,0x00,0xaf,0x00,0xa3,0xff
  1039. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x10,0x00
  1040. CRT,RUN,MISC_1,0x15,0x78,0x14,0x11
  1041. CRT,RUN,MODE_CONTROL,0x02
  1042. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1043. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  1044. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1045. CRT,RUN,EXT_VERT_OVERFLOW,0x57
  1046. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1047. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xae,0x00,0x00
  1048. CRT,RUN,EXT_MISC_CONTROL_3,0x02
  1049. # Lock CRTC Reg 11 for compatibility
  1050. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1051. # Dump ENG Register
  1052. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1053. # Dump MISCOUT Register
  1054. DIR,RUN,MISC_WRITE,0xef
  1055. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1056. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1057. CLK_IND, RUN, FREQ_2, 0xd3
  1058. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1059. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1060. CRT,RUN,LATCH_DATA, 0x08
  1061.  
  1062. [1600,1200,8,75,60]
  1063. # Unlock CRTC
  1064. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1065. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1066. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1067. # Dump CRT Controller Registers
  1068. CRT,RUN,HORZ_TOTAL,0x7f,0x64,0x62,0x02,0x68,0x12,0xe8,0x00,0x00,0x40
  1069. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1070. CRT,RUN,VERT_RETRACE_START,0xaf,0x0b,0xaf
  1071. CRT,RUN,UNDERLINE_LOCATION,0x00,0xaf,0x00,0xa3,0xff
  1072. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x10,0x00
  1073. CRT,RUN,MISC_1,0x15,0x77,0x14,0x11
  1074. CRT,RUN,MODE_CONTROL,0x02
  1075. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1076. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  1077. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1078. CRT,RUN,EXT_VERT_OVERFLOW,0x57
  1079. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1080. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xbe,0x00,0x00
  1081. CRT,RUN,EXT_MISC_CONTROL_3,0x02
  1082. # Lock CRTC Reg 11 for compatibility
  1083. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1084. # Dump ENG Register
  1085. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1086. # Dump MISCOUT Register
  1087. DIR,RUN,MISC_WRITE,0xef
  1088. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1089. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1090. CLK_IND, RUN, FREQ_2, 0xcd
  1091. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1092. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1093. CRT,RUN,LATCH_DATA, 0x08
  1094.  
  1095. [1280,1024,24,79,75]
  1096. # Unlock CRTC
  1097. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1098. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1099. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1100. # Dump CRT Controller Registers
  1101. CRT,RUN,HORZ_TOTAL,0x9a,0x77,0x78,0x9e,0x7e,0x06,0x29,0x42,0x00,0x40
  1102. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1103. CRT,RUN,VERT_RETRACE_START,0x00,0x07,0xff
  1104. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x03,0xe3,0xff
  1105. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x10,0x00
  1106. CRT,RUN,MISC_1,0x15,0x94,0x28,0x11
  1107. CRT,RUN,MODE_CONTROL,0x02
  1108. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1109. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  1110. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1111. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  1112. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1113. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  1114. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1115. # Lock CRTC Reg 11 for compatibility
  1116. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1117. # Dump ENG Register
  1118. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1119. # Dump MISCOUT Register
  1120. DIR,RUN,MISC_WRITE,0xef
  1121. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1122. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1123. CLK_IND, RUN, FREQ_2, 0xc1
  1124. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1125. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1126. CRT,RUN,LATCH_DATA, 0x00
  1127.  
  1128. [1280,1024,24,76,72]
  1129. # Unlock CRTC
  1130. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1131. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1132. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1133. # Dump CRT Controller Registers
  1134. CRT,RUN,HORZ_TOTAL,0xa0,0x77,0x78,0x84,0x7f,0x07,0x2c,0x42,0x00,0x40
  1135. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1136. CRT,RUN,VERT_RETRACE_START,0x00,0x07,0xff
  1137. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x06,0xe3,0xff
  1138. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x10,0x00
  1139. CRT,RUN,MISC_1,0x15,0x9a,0x28,0x11
  1140. CRT,RUN,MODE_CONTROL,0x02
  1141. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1142. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  1143. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1144. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  1145. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1146. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  1147. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1148. # Lock CRTC Reg 11 for compatibility
  1149. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1150. # Dump ENG Register
  1151. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1152. # Dump MISCOUT Register
  1153. DIR,RUN,MISC_WRITE,0xef
  1154. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1155. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1156. CLK_IND, RUN, FREQ_2, 0xc1
  1157. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1158. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1159. CRT,RUN,LATCH_DATA, 0x00
  1160.  
  1161. [1280,1024,24,64,60]
  1162. # Unlock CRTC
  1163. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1164. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1165. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1166. # Dump CRT Controller Registers
  1167. CRT,RUN,HORZ_TOTAL,0x9a,0x77,0x78,0x9e,0x7d,0x05,0x34,0x42,0x00,0x40
  1168. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1169. CRT,RUN,VERT_RETRACE_START,0x00,0x07,0xff
  1170. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x29,0xe3,0xff
  1171. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x10,0x00
  1172. CRT,RUN,MISC_1,0x15,0x95,0x28,0x11
  1173. CRT,RUN,MODE_CONTROL,0x02
  1174. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1175. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  1176. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1177. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  1178. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1179. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  1180. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1181. # Lock CRTC Reg 11 for compatibility
  1182. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1183. # Dump ENG Register
  1184. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1185. # Dump MISCOUT Register
  1186. DIR,RUN,MISC_WRITE,0xef
  1187. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1188. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1189. CLK_IND, RUN, FREQ_2, 0xab
  1190. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1191. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1192. CRT,RUN,LATCH_DATA, 0x00
  1193.  
  1194. [1280,1024,16,95,90]
  1195. # Unlock CRTC
  1196. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1197. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1198. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1199. # Dump CRT Controller Registers
  1200. CRT,RUN,HORZ_TOTAL,0x67,0x4f,0x50,0x8b,0x52,0x9a,0x2a,0x42,0x00,0x40
  1201. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1202. CRT,RUN,VERT_RETRACE_START,0x03,0x07,0xff
  1203. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x2a,0xe3,0xff
  1204. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x10,0x00
  1205. CRT,RUN,MISC_1,0x15,0x62,0x33,0x11
  1206. CRT,RUN,MODE_CONTROL,0x02
  1207. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1208. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  1209. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1210. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  1211. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1212. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xbe,0x00,0x00
  1213. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1214. # Lock CRTC Reg 11 for compatibility
  1215. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1216. # Dump ENG Register
  1217. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1218. # Dump MISCOUT Register
  1219. DIR,RUN,MISC_WRITE,0xef
  1220. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1221. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1222. CLK_IND, RUN, FREQ_2, 0xd0
  1223. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1224. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1225. CRT,RUN,LATCH_DATA, 0x00
  1226.  
  1227. [1280,1024,16,79,75]
  1228. # Unlock CRTC
  1229. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1230. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1231. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1232. # Dump CRT Controller Registers
  1233. CRT,RUN,HORZ_TOTAL,0x64,0x4f,0x50,0x89,0x51,0x9a,0x2c,0x42,0x00,0x40
  1234. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1235. CRT,RUN,VERT_RETRACE_START,0x00,0x03,0xff
  1236. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x2c,0xe3,0xff
  1237. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x10,0x00
  1238. CRT,RUN,MISC_1,0x15,0x5e,0x33,0x11
  1239. CRT,RUN,MODE_CONTROL,0x02
  1240. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1241. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  1242. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1243. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  1244. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1245. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xbe,0x00,0x00
  1246. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1247. # Lock CRTC Reg 11 for compatibility
  1248. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1249. # Dump ENG Register
  1250. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1251. # Dump MISCOUT Register
  1252. DIR,RUN,MISC_WRITE,0xef
  1253. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1254. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1255. CLK_IND, RUN, FREQ_2, 0xc1
  1256. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1257. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1258. CRT,RUN,LATCH_DATA, 0x00
  1259.  
  1260. [1280,1024,16,76,72]
  1261. # Unlock CRTC
  1262. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1263. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1264. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1265. # Dump CRT Controller Registers
  1266. CRT,RUN,HORZ_TOTAL,0x69,0x4f,0x50,0x8c,0x53,0x98,0x27,0x42,0x00,0x40
  1267. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1268. CRT,RUN,VERT_RETRACE_START,0x05,0x0c,0xff
  1269. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x23,0xe3,0xff
  1270. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x10,0x00
  1271. CRT,RUN,MISC_1,0x15,0x62,0x33,0x11
  1272. CRT,RUN,MODE_CONTROL,0x02
  1273. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1274. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  1275. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1276. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  1277. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1278. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xbe,0x00,0x00
  1279. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1280. # Lock CRTC Reg 11 for compatibility
  1281. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1282. # Dump ENG Register
  1283. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1284. # Dump MISCOUT Register
  1285. DIR,RUN,MISC_WRITE,0xef
  1286. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1287. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1288. CLK_IND, RUN, FREQ_2, 0xc1
  1289. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1290. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1291. CRT,RUN,LATCH_DATA, 0x00
  1292.  
  1293. [1280,1024,16,64,60]
  1294. # Unlock CRTC
  1295. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1296. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1297. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1298. # Dump CRT Controller Registers
  1299. CRT,RUN,HORZ_TOTAL,0x66,0x4f,0x50,0x89,0x53,0x98,0x33,0x42,0x00,0x40
  1300. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1301. CRT,RUN,VERT_RETRACE_START,0x00,0x07,0xff
  1302. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x28,0xe3,0xff
  1303. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x10,0x00
  1304. CRT,RUN,MISC_1,0x15,0x5f,0x33,0x11
  1305. CRT,RUN,MODE_CONTROL,0x02
  1306. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1307. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  1308. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1309. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  1310. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1311. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xbe,0x00,0x00
  1312. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1313. # Lock CRTC Reg 11 for compatibility
  1314. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1315. # Dump ENG Register
  1316. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1317. # Dump MISCOUT Register
  1318. DIR,RUN,MISC_WRITE,0xef
  1319. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1320. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1321. CLK_IND, RUN, FREQ_2, 0xab
  1322. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1323. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1324. CRT,RUN,LATCH_DATA, 0x00
  1325.  
  1326. [1280,1024,8,95,90]
  1327. # Unlock CRTC
  1328. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1329. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1330. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1331. # Dump CRT Controller Registers
  1332. CRT,RUN,HORZ_TOTAL,0x67,0x4f,0x50,0x8b,0x52,0x9a,0x2a,0x42,0x00,0x40
  1333. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1334. CRT,RUN,VERT_RETRACE_START,0x03,0x07,0xff
  1335. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x2a,0xe3,0xff
  1336. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x18,0x00
  1337. CRT,RUN,MISC_1,0x15,0x62,0x14,0x11
  1338. CRT,RUN,MODE_CONTROL,0x02
  1339. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1340. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  1341. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1342. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  1343. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1344. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xae,0x00,0x00
  1345. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1346. # Lock CRTC Reg 11 for compatibility
  1347. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1348. # Dump ENG Register
  1349. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1350. # Dump MISCOUT Register
  1351. DIR,RUN,MISC_WRITE,0xef
  1352. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1353. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1354. CLK_IND, RUN, FREQ_2, 0xd0
  1355. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1356. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1357. CRT,RUN,LATCH_DATA, 0x08
  1358.  
  1359. [1280,1024,8,79,75]
  1360. # Unlock CRTC
  1361. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1362. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1363. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1364. # Dump CRT Controller Registers
  1365. CRT,RUN,HORZ_TOTAL,0x64,0x4f,0x50,0x89,0x51,0x9a,0x2c,0x42,0x00,0x40
  1366. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1367. CRT,RUN,VERT_RETRACE_START,0x00,0x03,0xff
  1368. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x2c,0xe3,0xff
  1369. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x18,0x00
  1370. CRT,RUN,MISC_1,0x15,0x5e,0x14,0x11
  1371. CRT,RUN,MODE_CONTROL,0x02
  1372. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1373. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  1374. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1375. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  1376. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1377. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xae,0x00,0x00
  1378. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1379. # Lock CRTC Reg 11 for compatibility
  1380. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1381. # Dump ENG Register
  1382. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1383. # Dump MISCOUT Register
  1384. DIR,RUN,MISC_WRITE,0xef
  1385. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1386. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1387. CLK_IND, RUN, FREQ_2, 0xc1
  1388. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1389. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1390. CRT,RUN,LATCH_DATA, 0x08
  1391.  
  1392. [1280,1024,8,76,72]
  1393. # Unlock CRTC
  1394. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1395. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1396. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1397. # Dump CRT Controller Registers
  1398. CRT,RUN,HORZ_TOTAL,0x69,0x4f,0x50,0x8c,0x53,0x98,0x27,0x42,0x00,0x40
  1399. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1400. CRT,RUN,VERT_RETRACE_START,0x05,0x0c,0xff
  1401. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x23,0xe3,0xff
  1402. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x18,0x00
  1403. CRT,RUN,MISC_1,0x15,0x62,0x14,0x11
  1404. CRT,RUN,MODE_CONTROL,0x02
  1405. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1406. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  1407. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1408. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  1409. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1410. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xae,0x00,0x00
  1411. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1412. # Lock CRTC Reg 11 for compatibility
  1413. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1414. # Dump ENG Register
  1415. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1416. # Dump MISCOUT Register
  1417. DIR,RUN,MISC_WRITE,0xef
  1418. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1419. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1420. CLK_IND, RUN, FREQ_2, 0xc1
  1421. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1422. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1423. CRT,RUN,LATCH_DATA, 0x08
  1424.  
  1425. [1280,1024,8,64,60]
  1426. # Unlock CRTC
  1427. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1428. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1429. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1430. # Dump CRT Controller Registers
  1431. CRT,RUN,HORZ_TOTAL,0x66,0x4f,0x50,0x89,0x53,0x98,0x33,0x42,0x00,0x40
  1432. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1433. CRT,RUN,VERT_RETRACE_START,0x00,0x07,0xff
  1434. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x28,0xe3,0xff
  1435. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x18,0x00
  1436. CRT,RUN,MISC_1,0x15,0x5f,0x14,0x11
  1437. CRT,RUN,MODE_CONTROL,0x02
  1438. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1439. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  1440. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1441. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  1442. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1443. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xae,0x00,0x00
  1444. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1445. # Lock CRTC Reg 11 for compatibility
  1446. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1447. # Dump ENG Register
  1448. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1449. # Dump MISCOUT Register
  1450. DIR,RUN,MISC_WRITE,0xef
  1451. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1452. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1453. CLK_IND, RUN, FREQ_2, 0xab
  1454. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1455. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1456. CRT,RUN,LATCH_DATA, 0x08
  1457.  
  1458. [1152,864,32,64,70]
  1459. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1460. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1461. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1462. CRT,RUN,HORZ_TOTAL,0x57,0x47,0x48,0x9a,0x4a,0x0f,0x92,0xff,0x00,0x60
  1463. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1464. CRT,RUN,VERT_RETRACE_START,0x6b,0x02,0x5f
  1465. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0x7d,0xeb,0xff
  1466. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  1467. CRT,RUN,MISC_1,0x15,0x4f,0x9f,0x11
  1468. CRT,RUN,MODE_CONTROL,0x02
  1469. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1470. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  1471. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1472. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1473. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1474. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xbe,0x00,0x00
  1475. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1476. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1477. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1478. DIR,RUN,MISC_WRITE,0x2f
  1479. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1480. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1481. CLK_IND, RUN, FREQ_2, 0x9b
  1482. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1483. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1484. CRT,RUN,LATCH_DATA, 0x00
  1485.  
  1486. [1152,864,32,56,60]
  1487. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1488. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1489. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1490. CRT,RUN,HORZ_TOTAL,0x57,0x47,0x48,0x9b,0x49,0x0d,0xac,0xff,0x00,0x60
  1491. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1492. CRT,RUN,VERT_RETRACE_START,0x77,0x10,0x5f
  1493. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0xac,0xeb,0xff
  1494. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  1495. CRT,RUN,MISC_1,0x15,0xb1,0x9f,0x11
  1496. CRT,RUN,MODE_CONTROL,0x02
  1497. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1498. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  1499. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1500. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1501. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1502. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xbe,0x00,0x00
  1503. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1504. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1505. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1506. DIR,RUN,MISC_WRITE,0x2f
  1507. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1508. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1509. CLK_IND, RUN, FREQ_2, 0x90
  1510. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1511. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1512. CRT,RUN,LATCH_DATA, 0x00
  1513.  
  1514. [1152,864,24,64,70]
  1515. # Unlock CRTC
  1516. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1517. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1518. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1519. # Dump CRT Controller Registers
  1520. CRT,RUN,HORZ_TOTAL,0x85,0x6b,0x6c,0x89,0x6f,0x16,0x92,0xff,0x00,0x60
  1521. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1522. CRT,RUN,VERT_RETRACE_START,0x6b,0x02,0x5f
  1523. CRT,RUN,UNDERLINE_LOCATION,0x60,0x59,0x7d,0xeb,0xff
  1524. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x10,0x00
  1525. CRT,RUN,MISC_1,0x15,0x7f,0x9f,0x11
  1526. CRT,RUN,MODE_CONTROL,0x02
  1527. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1528. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  1529. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1530. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1531. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1532. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  1533. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1534. # Lock CRTC Reg 11 for compatibility
  1535. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1536. # Dump ENG Register
  1537. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1538. # Dump MISCOUT Register
  1539. DIR,RUN,MISC_WRITE,0xef
  1540. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1541. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1542. CLK_IND, RUN, FREQ_2, 0x9b
  1543. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1544. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1545. CRT,RUN,LATCH_DATA, 0x00
  1546.  
  1547. [1152,864,24,56,60]
  1548. # Unlock CRTC
  1549. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1550. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1551. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1552. # Dump CRT Controller Registers
  1553. CRT,RUN,HORZ_TOTAL,0x85,0x6b,0x6c,0x89,0x6f,0x15,0xac,0xff,0x00,0x60
  1554. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1555. CRT,RUN,VERT_RETRACE_START,0x77,0x00,0x5f
  1556. CRT,RUN,UNDERLINE_LOCATION,0x60,0x59,0x99,0xeb,0xff
  1557. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x14,0x00
  1558. CRT,RUN,MISC_1,0x15,0x7f,0x3d,0x11
  1559. CRT,RUN,MODE_CONTROL,0x02
  1560. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1561. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  1562. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1563. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1564. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1565. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  1566. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1567. # Lock CRTC Reg 11 for compatibility
  1568. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1569. # Dump ENG Register
  1570. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1571. # Dump MISCOUT Register
  1572. DIR,RUN,MISC_WRITE,0xef
  1573. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1574. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1575. CLK_IND, RUN, FREQ_2, 0x90
  1576. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1577. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1578. CRT,RUN,LATCH_DATA, 0x00
  1579.  
  1580. [1152,864,16,82,90]
  1581. # Unlock CRTC
  1582. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1583. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1584. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1585. # Dump CRT Controller Registers
  1586. CRT,RUN,HORZ_TOTAL,0x59,0x47,0x48,0x9c,0x4a,0x0e,0x95,0xff,0x00,0x60
  1587. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1588. CRT,RUN,VERT_RETRACE_START,0x65,0x04,0x5f
  1589. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0x99,0xeb,0xff
  1590. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x08,0x00
  1591. CRT,RUN,MISC_1,0x15,0x4f,0x9f,0x11
  1592. CRT,RUN,MODE_CONTROL,0x02
  1593. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1594. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  1595. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1596. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1597. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1598. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1599. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1600. # Lock CRTC Reg 11 for compatibility
  1601. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1602. # Dump ENG Register
  1603. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1604. # Dump MISCOUT Register
  1605. DIR,RUN,MISC_WRITE,0xef
  1606. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1607. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1608. CLK_IND, RUN, FREQ_2, 0xb9
  1609. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1610. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1611. CRT,RUN,LATCH_DATA, 0x00
  1612.  
  1613. [1152,864,16,71,75]
  1614. # Unlock CRTC
  1615. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1616. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1617. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1618. # Dump CRT Controller Registers
  1619. CRT,RUN,HORZ_TOTAL,0x5a,0x47,0x48,0x9d,0x4b,0x0f,0xb7,0xff,0x00,0x60
  1620. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1621. CRT,RUN,VERT_RETRACE_START,0x81,0x00,0x5f
  1622. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0xa2,0xeb,0xff
  1623. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x08,0x00
  1624. CRT,RUN,MISC_1,0x15,0x4f,0x9f,0x11
  1625. CRT,RUN,MODE_CONTROL,0x02
  1626. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1627. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  1628. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1629. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1630. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1631. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1632. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1633. # Lock CRTC Reg 11 for compatibility
  1634. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1635. # Dump ENG Register
  1636. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1637. # Dump MISCOUT Register
  1638. DIR,RUN,MISC_WRITE,0xef
  1639. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1640. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1641. CLK_IND, RUN, FREQ_2, 0xa9
  1642. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1643. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1644. CRT,RUN,LATCH_DATA, 0x00
  1645.  
  1646. [1152,864,16,64,70]
  1647. # Unlock CRTC
  1648. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1649. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1650. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1651. # Dump CRT Controller Registers
  1652. CRT,RUN,HORZ_TOTAL,0x57,0x47,0x48,0x9a,0x4a,0x0f,0x92,0xff,0x00,0x60
  1653. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1654. CRT,RUN,VERT_RETRACE_START,0x6b,0x02,0x5f
  1655. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0x7d,0xeb,0xff
  1656. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x08,0x00
  1657. CRT,RUN,MISC_1,0x15,0x4f,0x9f,0x11
  1658. CRT,RUN,MODE_CONTROL,0x02
  1659. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1660. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  1661. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1662. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1663. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1664. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1665. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1666. # Lock CRTC Reg 11 for compatibility
  1667. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1668. # Dump ENG Register
  1669. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1670. # Dump MISCOUT Register
  1671. DIR,RUN,MISC_WRITE,0xef
  1672. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1673. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1674. CLK_IND, RUN, FREQ_2, 0x9b
  1675. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1676. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1677. CRT,RUN,LATCH_DATA, 0x00
  1678.  
  1679. [1152,864,16,56,60]
  1680. # Unlock CRTC
  1681. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1682. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1683. CRT,RUN,REG_LOCK_1,0x48,0xA5
  1684. # Dump CRT Controller Registers
  1685. CRT,RUN,HORZ_TOTAL,0x57,0x47,0x48,0x9b,0x49,0x0d,0xac,0xff,0x00,0x60
  1686. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1687. CRT,RUN,VERT_RETRACE_START,0x77,0x10,0x5f
  1688. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0xac,0xeb,0xff
  1689. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x08,0x00
  1690. CRT,RUN,MISC_1,0x15,0xb1,0x9f,0x11
  1691. CRT,RUN,MODE_CONTROL,0x02
  1692. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1693. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  1694. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1695. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1696. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1697. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1698. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1699. # Lock CRTC Reg 11 for compatibility
  1700. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1701. # Dump ENG Register
  1702. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1703. # Dump MISCOUT Register
  1704. DIR,RUN,MISC_WRITE,0xef
  1705. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1706. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1707. CLK_IND, RUN, FREQ_2, 0x90
  1708. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1709. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1710. CRT,RUN,LATCH_DATA, 0x00
  1711.  
  1712. [1152,864,8,82,90]
  1713. # Unlock CRTC
  1714. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1715. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1716. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1717. # Dump CRT Controller Registers
  1718. CRT,RUN,HORZ_TOTAL,0x59,0x47,0x48,0x9c,0x4a,0x0e,0x95,0xff,0x00,0x60
  1719. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1720. CRT,RUN,VERT_RETRACE_START,0x65,0x04,0x5f
  1721. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0x99,0xeb,0xff
  1722. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1723. CRT,RUN,MISC_1,0x15,0x4f,0x9f,0x11
  1724. CRT,RUN,MODE_CONTROL,0x02
  1725. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1726. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  1727. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1728. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1729. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1730. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1731. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1732. # Lock CRTC Reg 11 for compatibility
  1733. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1734. # Dump ENG Register
  1735. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1736. # Dump MISCOUT Register
  1737. DIR,RUN,MISC_WRITE,0xef
  1738. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1739. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1740. CLK_IND, RUN, FREQ_2, 0xb9
  1741. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1742. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1743. CRT,RUN,LATCH_DATA, 0x08
  1744.  
  1745. [1152,864,8,71,75]
  1746. # Unlock CRTC
  1747. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1748. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1749. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1750. # Dump CRT Controller Registers
  1751. CRT,RUN,HORZ_TOTAL,0x5a,0x47,0x48,0x9d,0x4b,0x0f,0xb7,0xff,0x00,0x60
  1752. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1753. CRT,RUN,VERT_RETRACE_START,0x81,0x00,0x5f
  1754. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0xa2,0xeb,0xff
  1755. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1756. CRT,RUN,MISC_1,0x15,0x4f,0x9f,0x11
  1757. CRT,RUN,MODE_CONTROL,0x02
  1758. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1759. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  1760. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1761. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1762. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1763. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1764. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1765. # Lock CRTC Reg 11 for compatibility
  1766. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1767. # Dump ENG Register
  1768. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1769. # Dump MISCOUT Register
  1770. DIR,RUN,MISC_WRITE,0xef
  1771. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1772. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1773. CLK_IND, RUN, FREQ_2, 0xa9
  1774. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1775. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1776. CRT,RUN,LATCH_DATA, 0x08
  1777.  
  1778. [1152,864,8,64,70]
  1779. # Unlock CRTC
  1780. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1781. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1782. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1783. # Dump CRT Controller Registers
  1784. CRT,RUN,HORZ_TOTAL,0x57,0x47,0x48,0x9a,0x4a,0x0f,0x92,0xff,0x00,0x60
  1785. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1786. CRT,RUN,VERT_RETRACE_START,0x6b,0x02,0x5f
  1787. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0x7d,0xeb,0xff
  1788. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1789. CRT,RUN,MISC_1,0x15,0x4f,0x9f,0x11
  1790. CRT,RUN,MODE_CONTROL,0x02
  1791. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1792. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  1793. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1794. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1795. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1796. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1797. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1798. # Lock CRTC Reg 11 for compatibility
  1799. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1800. # Dump ENG Register
  1801. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1802. # Dump MISCOUT Register
  1803. DIR,RUN,MISC_WRITE,0xef
  1804. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1805. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1806. CLK_IND, RUN, FREQ_2, 0x9b
  1807. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1808. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1809. CRT,RUN,LATCH_DATA, 0x08
  1810.  
  1811. [1152,864,8,56,60]
  1812. # Unlock CRTC
  1813. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1814. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1815. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1816. # Dump CRT Controller Registers
  1817. CRT,RUN,HORZ_TOTAL,0x57,0x47,0x48,0x9b,0x49,0x0d,0xac,0xff,0x00,0x60
  1818. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1819. CRT,RUN,VERT_RETRACE_START,0x77,0x10,0x5f
  1820. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0xac,0xeb,0xff
  1821. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1822. CRT,RUN,MISC_1,0x15,0xb1,0x9f,0x11
  1823. CRT,RUN,MODE_CONTROL,0x02
  1824. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1825. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  1826. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1827. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1828. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1829. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1830. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1831. # Lock CRTC Reg 11 for compatibility
  1832. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1833. # Dump ENG Register
  1834. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1835. # Dump MISCOUT Register
  1836. DIR,RUN,MISC_WRITE,0xef
  1837. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1838. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1839. CLK_IND, RUN, FREQ_2, 0x90
  1840. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1841. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1842. CRT,RUN,LATCH_DATA, 0x08
  1843.  
  1844. [1024,768,32,64,80]
  1845. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1846. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1847. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1848. CRT,RUN,HORZ_TOTAL,0x4e,0x3f,0x40,0x11,0x44,0x0b,0x26,0xf5,0x00,0x60
  1849. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1850. CRT,RUN,VERT_RETRACE_START,0x0a,0x08,0xff
  1851. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  1852. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  1853. CRT,RUN,MISC_1,0x15,0x47,0x25,0x11
  1854. CRT,RUN,MODE_CONTROL,0x02
  1855. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1856. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  1857. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1858. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1859. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1860. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xbe,0x00,0x00
  1861. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1862. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1863. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1864. DIR,RUN,MISC_WRITE,0x2f
  1865. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1866. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1867. CLK_IND, RUN, FREQ_2, 0x93
  1868. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1869. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1870. CRT,RUN,LATCH_DATA, 0x00
  1871.  
  1872. [1024,768,32,60,75]
  1873. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1874. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1875. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1876. CRT,RUN,HORZ_TOTAL,0x4d,0x3f,0x40,0x11,0x41,0x07,0x1e,0xf5,0x00,0x60
  1877. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1878. CRT,RUN,VERT_RETRACE_START,0x00,0x03,0xff
  1879. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x1e,0xe3,0xff
  1880. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  1881. CRT,RUN,MISC_1,0x15,0x47,0x25,0x11
  1882. CRT,RUN,MODE_CONTROL,0x02
  1883. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1884. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  1885. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1886. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1887. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1888. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xbe,0x00,0x00
  1889. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1890. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1891. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1892. DIR,RUN,MISC_WRITE,0x2f
  1893. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1894. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1895. CLK_IND, RUN, FREQ_2, 0x8c
  1896. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1897. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1898. CRT,RUN,LATCH_DATA, 0x00
  1899.  
  1900. [1024,768,32,58,72]
  1901. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1902. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1903. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1904. CRT,RUN,HORZ_TOTAL,0x4c,0x3f,0x40,0x13,0x42,0x0f,0x20,0xf5,0x00,0x60
  1905. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1906. CRT,RUN,VERT_RETRACE_START,0x00,0x06,0xff
  1907. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x1a,0xe3,0xff
  1908. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  1909. CRT,RUN,MISC_1,0x15,0x45,0x25,0x11
  1910. CRT,RUN,MODE_CONTROL,0x02
  1911. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1912. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  1913. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1914. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1915. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1916. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xbe,0x00,0x00
  1917. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1918. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1919. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1920. DIR,RUN,MISC_WRITE,0x2f
  1921. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1922. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1923. CLK_IND, RUN, FREQ_2, 0x88
  1924. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1925. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1926. CRT,RUN,LATCH_DATA, 0x00
  1927.  
  1928. [1024,768,32,56,70]
  1929. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1930. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1931. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1932. CRT,RUN,HORZ_TOTAL,0x4e,0x3f,0x40,0x12,0x41,0x0a,0x24,0xf5,0x00,0x60
  1933. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1934. CRT,RUN,VERT_RETRACE_START,0x02,0x08,0xff
  1935. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  1936. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  1937. CRT,RUN,MISC_1,0x15,0x47,0x25,0x11
  1938. CRT,RUN,MODE_CONTROL,0x02
  1939. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1940. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  1941. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1942. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1943. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1944. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xbe,0x00,0x00
  1945. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1946. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1947. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1948. DIR,RUN,MISC_WRITE,0x2f
  1949. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1950. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1951. CLK_IND, RUN, FREQ_2, 0x88
  1952. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1953. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1954. CRT,RUN,LATCH_DATA, 0x00
  1955.  
  1956. [1024,768,32,48,60]
  1957. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1958. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1959. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1960. CRT,RUN,HORZ_TOTAL,0x4f,0x3f,0x40,0x12,0x41,0x0a,0x24,0xf5,0x00,0x60
  1961. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1962. CRT,RUN,VERT_RETRACE_START,0x02,0x08,0xff
  1963. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  1964. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  1965. CRT,RUN,MISC_1,0x15,0x48,0x25,0x11
  1966. CRT,RUN,MODE_CONTROL,0x02
  1967. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1968. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  1969. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1970. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1971. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1972. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xbe,0x00,0x00
  1973. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1974. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1975. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1976. DIR,RUN,MISC_WRITE,0x2f
  1977. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1978. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1979. CLK_IND, RUN, FREQ_2, 0x7e
  1980. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1981. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1982. CRT,RUN,LATCH_DATA, 0x00
  1983.  
  1984. [1024,768,24,64,80]
  1985. # Unlock CRTC
  1986. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1987. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1988. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1989. # Dump CRT Controller Registers
  1990. CRT,RUN,HORZ_TOTAL,0x79,0x5f,0x60,0x9d,0x65,0x8e,0x1f,0xf5,0x00,0x60
  1991. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1992. CRT,RUN,VERT_RETRACE_START,0x00,0x0e,0xff
  1993. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x1b,0xeb,0xff
  1994. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x14,0x00
  1995. CRT,RUN,MISC_1,0x15,0x70,0x3d,0x11
  1996. CRT,RUN,MODE_CONTROL,0x02
  1997. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1998. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  1999. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2000. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2001. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2002. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  2003. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2004. # Lock CRTC Reg 11 for compatibility
  2005. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2006. # Dump ENG Register
  2007. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2008. # Dump MISCOUT Register
  2009. DIR,RUN,MISC_WRITE,0xef
  2010. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2011. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2012. CLK_IND, RUN, FREQ_2, 0x93
  2013. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2014. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2015. CRT,RUN,LATCH_DATA, 0x00
  2016.  
  2017. [1024,768,24,60,75]
  2018. # Unlock CRTC
  2019. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2020. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2021. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2022. # Dump CRT Controller Registers
  2023. CRT,RUN,HORZ_TOTAL,0x76,0x5f,0x60,0x99,0x63,0x90,0x1e,0xf1,0x00,0x60
  2024. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2025. CRT,RUN,VERT_RETRACE_START,0xff,0x05,0xff
  2026. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x1e,0xeb,0xff
  2027. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x14,0x00
  2028. CRT,RUN,MISC_1,0x15,0x70,0x21,0x11
  2029. CRT,RUN,MODE_CONTROL,0x02
  2030. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2031. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  2032. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2033. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2034. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2035. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  2036. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2037. # Lock CRTC Reg 11 for compatibility
  2038. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2039. # Dump ENG Register
  2040. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2041. # Dump MISCOUT Register
  2042. DIR,RUN,MISC_WRITE,0xef
  2043. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2044. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2045. CLK_IND, RUN, FREQ_2, 0x8c
  2046. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2047. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2048. CRT,RUN,LATCH_DATA, 0x00
  2049.  
  2050. [1024,768,24,58,72]
  2051. # Unlock CRTC
  2052. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2053. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2054. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2055. # Dump CRT Controller Registers
  2056. CRT,RUN,HORZ_TOTAL,0x76,0x5f,0x60,0x9a,0x61,0x8a,0x19,0xf5,0x00,0x60
  2057. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2058. CRT,RUN,VERT_RETRACE_START,0x00,0x06,0xff
  2059. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x11,0xeb,0xff
  2060. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x14,0x00
  2061. CRT,RUN,MISC_1,0x15,0x70,0x21,0x11
  2062. CRT,RUN,MODE_CONTROL,0x02
  2063. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2064. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  2065. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2066. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2067. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2068. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  2069. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2070. # Lock CRTC Reg 11 for compatibility
  2071. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2072. # Dump ENG Register
  2073. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2074. # Dump MISCOUT Register
  2075. DIR,RUN,MISC_WRITE,0xef
  2076. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2077. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2078. CLK_IND, RUN, FREQ_2, 0x88
  2079. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2080. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2081. CRT,RUN,LATCH_DATA, 0x00
  2082.  
  2083. [1024,768,24,56,70]
  2084. # Unlock CRTC
  2085. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2086. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2087. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2088. # Dump CRT Controller Registers
  2089. CRT,RUN,HORZ_TOTAL,0x76,0x5f,0x60,0x1b,0x62,0x8f,0x2a,0xf5,0x00,0x60
  2090. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2091. CRT,RUN,VERT_RETRACE_START,0x03,0x09,0xff
  2092. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x2a,0xeb,0xff
  2093. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x14,0x00
  2094. CRT,RUN,MISC_1,0x15,0x71,0x21,0x11
  2095. CRT,RUN,MODE_CONTROL,0x02
  2096. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2097. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  2098. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2099. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2100. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2101. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  2102. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2103. # Lock CRTC Reg 11 for compatibility
  2104. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2105. # Dump ENG Register
  2106. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2107. # Dump MISCOUT Register
  2108. DIR,RUN,MISC_WRITE,0xef
  2109. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2110. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2111. CLK_IND, RUN, FREQ_2, 0x88
  2112. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2113. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2114. CRT,RUN,LATCH_DATA, 0x00
  2115.  
  2116. [1024,768,24,48,60]
  2117. # Unlock CRTC
  2118. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2119. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2120. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2121. # Dump CRT Controller Registers
  2122. CRT,RUN,HORZ_TOTAL,0x79,0x5f,0x60,0x9d,0x62,0x8f,0x24,0xf5,0x00,0x60
  2123. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2124. CRT,RUN,VERT_RETRACE_START,0x02,0x08,0xff
  2125. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xeb,0xff
  2126. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x14,0x00
  2127. CRT,RUN,MISC_1,0x15,0x73,0x21,0x11
  2128. CRT,RUN,MODE_CONTROL,0x02
  2129. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2130. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  2131. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2132. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2133. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2134. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  2135. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2136. # Lock CRTC Reg 11 for compatibility
  2137. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2138. # Dump ENG Register
  2139. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2140. # Dump MISCOUT Register
  2141. DIR,RUN,MISC_WRITE,0xef
  2142. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2143. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2144. CLK_IND, RUN, FREQ_2, 0x7e
  2145. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2146. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2147. CRT,RUN,LATCH_DATA, 0x00
  2148.  
  2149. [1024,768,16,96,120]
  2150. # Unlock CRTC
  2151. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2152. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2153. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2154. # Dump CRT Controller Registers
  2155. CRT,RUN,HORZ_TOTAL,0x4e,0x3f,0x40,0x11,0x43,0x0e,0x28,0xf5,0x00,0x60
  2156. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2157. CRT,RUN,VERT_RETRACE_START,0x00,0x02,0xff
  2158. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  2159. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2160. CRT,RUN,MISC_1,0x15,0x49,0x20,0x11
  2161. CRT,RUN,MODE_CONTROL,0x02
  2162. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2163. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  2164. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2165. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2166. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2167. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2168. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2169. # Lock CRTC Reg 11 for compatibility
  2170. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2171. # Dump ENG Register
  2172. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2173. # Dump MISCOUT Register
  2174. DIR,RUN,MISC_WRITE,0xef
  2175. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2176. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2177. CLK_IND, RUN, FREQ_2, 0xbd
  2178. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2179. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2180. CRT,RUN,LATCH_DATA, 0x00
  2181.  
  2182. [1024,768,16,81,100]
  2183. # Unlock CRTC
  2184. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2185. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2186. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2187. # Dump CRT Controller Registers
  2188. CRT,RUN,HORZ_TOTAL,0x4f,0x3f,0x40,0x12,0x42,0x0b,0x24,0xf5,0x00,0x60
  2189. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2190. CRT,RUN,VERT_RETRACE_START,0x01,0x07,0xff
  2191. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  2192. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2193. CRT,RUN,MISC_1,0x15,0x49,0x20,0x11
  2194. CRT,RUN,MODE_CONTROL,0x02
  2195. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2196. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  2197. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2198. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2199. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2200. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2201. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2202. # Lock CRTC Reg 11 for compatibility
  2203. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2204. # Dump ENG Register
  2205. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2206. # Dump MISCOUT Register
  2207. DIR,RUN,MISC_WRITE,0xef
  2208. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2209. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2210. CLK_IND, RUN, FREQ_2, 0xa9
  2211. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2212. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2213. CRT,RUN,LATCH_DATA, 0x00
  2214.  
  2215. [1024,768,16,64,80]
  2216. # Unlock CRTC
  2217. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2218. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2219. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2220. # Dump CRT Controller Registers
  2221. CRT,RUN,HORZ_TOTAL,0x4e,0x3f,0x40,0x11,0x44,0x0b,0x26,0xf5,0x00,0x60
  2222. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2223. CRT,RUN,VERT_RETRACE_START,0x0a,0x08,0xff
  2224. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  2225. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2226. CRT,RUN,MISC_1,0x15,0x47,0x20,0x11
  2227. CRT,RUN,MODE_CONTROL,0x02
  2228. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2229. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  2230. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2231. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2232. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2233. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2234. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2235. # Lock CRTC Reg 11 for compatibility
  2236. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2237. # Dump ENG Register
  2238. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2239. # Dump MISCOUT Register
  2240. DIR,RUN,MISC_WRITE,0xef
  2241. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2242. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2243. CLK_IND, RUN, FREQ_2, 0x93
  2244. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2245. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2246. CRT,RUN,LATCH_DATA, 0x00
  2247.  
  2248. [1024,768,16,60,75]
  2249. # Unlock CRTC
  2250. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2251. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2252. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2253. # Dump CRT Controller Registers
  2254. CRT,RUN,HORZ_TOTAL,0x4d,0x3f,0x40,0x11,0x41,0x07,0x1e,0xf5,0x00,0x60
  2255. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2256. CRT,RUN,VERT_RETRACE_START,0x00,0x03,0xff
  2257. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x1e,0xe3,0xff
  2258. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2259. CRT,RUN,MISC_1,0x15,0x47,0x20,0x11
  2260. CRT,RUN,MODE_CONTROL,0x02
  2261. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2262. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  2263. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2264. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2265. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2266. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2267. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2268. # Lock CRTC Reg 11 for compatibility
  2269. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2270. # Dump ENG Register
  2271. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2272. # Dump MISCOUT Register
  2273. DIR,RUN,MISC_WRITE,0xef
  2274. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2275. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2276. CLK_IND, RUN, FREQ_2, 0x8c
  2277. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2278. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2279. CRT,RUN,LATCH_DATA, 0x00
  2280.  
  2281. [1024,768,16,58,72]
  2282. # Unlock CRTC
  2283. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2284. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2285. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2286. # Dump CRT Controller Registers
  2287. CRT,RUN,HORZ_TOTAL,0x4c,0x3f,0x40,0x13,0x42,0x0f,0x20,0xf5,0x00,0x60
  2288. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2289. CRT,RUN,VERT_RETRACE_START,0x00,0x06,0xff
  2290. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x1a,0xe3,0xff
  2291. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2292. CRT,RUN,MISC_1,0x15,0x45,0x20,0x11
  2293. CRT,RUN,MODE_CONTROL,0x02
  2294. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2295. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  2296. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2297. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2298. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2299. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2300. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2301. # Lock CRTC Reg 11 for compatibility
  2302. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2303. # Dump ENG Register
  2304. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2305. # Dump MISCOUT Register
  2306. DIR,RUN,MISC_WRITE,0xef
  2307. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2308. CLK_IND, RUN, FREQ_2,0x88
  2309. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2310. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2311. CLK_IND, RUN, FREQ_2, 0x88
  2312. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2313. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2314. CRT,RUN,LATCH_DATA, 0x00
  2315.  
  2316. [1024,768,16,56,70]
  2317. # Unlock CRTC
  2318. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2319. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2320. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2321. # Dump CRT Controller Registers
  2322. CRT,RUN,HORZ_TOTAL,0x4e,0x3f,0x40,0x12,0x41,0x0a,0x24,0xf5,0x00,0x60
  2323. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2324. CRT,RUN,VERT_RETRACE_START,0x02,0x08,0xff
  2325. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  2326. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2327. CRT,RUN,MISC_1,0x15,0x47,0x20,0x11
  2328. CRT,RUN,MODE_CONTROL,0x02
  2329. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2330. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  2331. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2332. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2333. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2334. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2335. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2336. # Lock CRTC Reg 11 for compatibility
  2337. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2338. # Dump ENG Register
  2339. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2340. # Dump MISCOUT Register
  2341. DIR,RUN,MISC_WRITE,0xef
  2342. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2343. CLK_IND, RUN, FREQ_2,0x88
  2344. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2345. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2346. CLK_IND, RUN, FREQ_2, 0x88
  2347. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2348. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2349. CRT,RUN,LATCH_DATA, 0x00
  2350.  
  2351. [1024,768,16,48,60]
  2352. # Unlock CRTC
  2353. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2354. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2355. CRT,RUN,REG_LOCK_1,0x48,0xA5
  2356. # Dump CRT Controller Registers
  2357. CRT,RUN,HORZ_TOTAL,0x4f,0x3f,0x40,0x12,0x41,0x0a,0x24,0xf5,0x00,0x60
  2358. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2359. CRT,RUN,VERT_RETRACE_START,0x02,0x08,0xff
  2360. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  2361. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2362. CRT,RUN,MISC_1,0x15,0x48,0x20,0x11
  2363. CRT,RUN,MODE_CONTROL,0x02
  2364. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2365. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  2366. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2367. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2368. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2369. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2370. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2371. # Lock CRTC Reg 11 for compatibility
  2372. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2373. # Dump ENG Register
  2374. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2375. # Dump MISCOUT Register
  2376. DIR,RUN,MISC_WRITE,0xef
  2377. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2378. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2379. CLK_IND, RUN, FREQ_2, 0x7E
  2380. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2381. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2382. CRT,RUN,LATCH_DATA, 0x00
  2383.  
  2384. [1024,768,8,96,120]
  2385. # Unlock CRTC
  2386. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2387. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2388. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2389. # Dump CRT Controller Registers
  2390. CRT,RUN,HORZ_TOTAL,0x4e,0x3f,0x40,0x11,0x43,0x0e,0x28,0xf5,0x00,0x60
  2391. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2392. CRT,RUN,VERT_RETRACE_START,0x00,0x02,0xff
  2393. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  2394. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2395. CRT,RUN,MISC_1,0x15,0x49,0x25,0x11
  2396. CRT,RUN,MODE_CONTROL,0x02
  2397. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2398. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  2399. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2400. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2401. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2402. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2403. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2404. # Lock CRTC Reg 11 for compatibility
  2405. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2406. # Dump ENG Register
  2407. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2408. # Dump MISCOUT Register
  2409. DIR,RUN,MISC_WRITE,0xef
  2410. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2411. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2412. CLK_IND, RUN, FREQ_2, 0xbd
  2413. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2414. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2415. CRT,RUN,LATCH_DATA, 0x08
  2416.  
  2417. [1024,768,8,81,100]
  2418. # Unlock CRTC
  2419. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2420. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2421. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2422. # Dump CRT Controller Registers
  2423. CRT,RUN,HORZ_TOTAL,0x4f,0x3f,0x40,0x12,0x42,0x0b,0x24,0xf5,0x00,0x60
  2424. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2425. CRT,RUN,VERT_RETRACE_START,0x01,0x07,0xff
  2426. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  2427. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2428. CRT,RUN,MISC_1,0x15,0x49,0x25,0x11
  2429. CRT,RUN,MODE_CONTROL,0x02
  2430. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2431. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  2432. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2433. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2434. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2435. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2436. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2437. # Lock CRTC Reg 11 for compatibility
  2438. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2439. # Dump ENG Register
  2440. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2441. # Dump MISCOUT Register
  2442. DIR,RUN,MISC_WRITE,0xef
  2443. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2444. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2445. CLK_IND, RUN, FREQ_2, 0xa9
  2446. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2447. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2448. CRT,RUN,LATCH_DATA, 0x08
  2449.  
  2450. [1024,768,8,64,80]
  2451. # Unlock CRTC
  2452. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2453. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2454. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2455. # Dump CRT Controller Registers
  2456. CRT,RUN,HORZ_TOTAL,0x4e,0x3f,0x40,0x11,0x44,0x0b,0x26,0xf5,0x00,0x60
  2457. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2458. CRT,RUN,VERT_RETRACE_START,0x0a,0x08,0xff
  2459. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  2460. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2461. CRT,RUN,MISC_1,0x15,0x47,0x25,0x11
  2462. CRT,RUN,MODE_CONTROL,0x02
  2463. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2464. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  2465. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2466. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2467. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2468. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2469. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2470. # Lock CRTC Reg 11 for compatibility
  2471. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2472. # Dump ENG Register
  2473. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2474. # Dump MISCOUT Register
  2475. DIR,RUN,MISC_WRITE,0xef
  2476. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2477. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2478. CLK_IND, RUN, FREQ_2, 0x93
  2479. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2480. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2481. CRT,RUN,LATCH_DATA, 0x08
  2482.  
  2483. [1024,768,8,60,75]
  2484. # Unlock CRTC
  2485. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2486. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2487. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2488. # Dump CRT Controller Registers
  2489. CRT,RUN,HORZ_TOTAL,0x4d,0x3f,0x40,0x11,0x41,0x07,0x1e,0xf5,0x00,0x60
  2490. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2491. CRT,RUN,VERT_RETRACE_START,0x00,0x03,0xff
  2492. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x1e,0xe3,0xff
  2493. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2494. CRT,RUN,MISC_1,0x15,0x47,0x25,0x11
  2495. CRT,RUN,MODE_CONTROL,0x02
  2496. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2497. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  2498. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2499. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2500. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2501. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2502. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2503. # Lock CRTC Reg 11 for compatibility
  2504. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2505. # Dump ENG Register
  2506. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2507. # Dump MISCOUT Register
  2508. DIR,RUN,MISC_WRITE,0xef
  2509. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2510. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2511. CLK_IND, RUN, FREQ_2, 0x8c
  2512. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2513. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2514. CRT,RUN,LATCH_DATA, 0x08
  2515.  
  2516. [1024,768,8,58,72]
  2517. # Unlock CRTC
  2518. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2519. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2520. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2521. # Dump CRT Controller Registers
  2522. CRT,RUN,HORZ_TOTAL,0x4c,0x3f,0x40,0x13,0x42,0x0f,0x20,0xf5,0x00,0x60
  2523. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2524. CRT,RUN,VERT_RETRACE_START,0x00,0x06,0xff
  2525. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x1a,0xe3,0xff
  2526. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2527. CRT,RUN,MISC_1,0x15,0x45,0x25,0x11
  2528. CRT,RUN,MODE_CONTROL,0x02
  2529. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2530. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  2531. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2532. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2533. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2534. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2535. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2536. # Lock CRTC Reg 11 for compatibility
  2537. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2538. # Dump ENG Register
  2539. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2540. # Dump MISCOUT Register
  2541. DIR,RUN,MISC_WRITE,0xef
  2542. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2543. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2544. CLK_IND, RUN, FREQ_2, 0x88
  2545. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2546. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2547. CRT,RUN,LATCH_DATA, 0x08
  2548.  
  2549. [1024,768,8,56,70]
  2550. # Unlock CRTC
  2551. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2552. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2553. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2554. # Dump CRT Controller Registers
  2555. CRT,RUN,HORZ_TOTAL,0x4e,0x3f,0x40,0x12,0x41,0x0a,0x24,0xf5,0x00,0x60
  2556. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2557. CRT,RUN,VERT_RETRACE_START,0x02,0x08,0xff
  2558. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  2559. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2560. CRT,RUN,MISC_1,0x15,0x47,0x25,0x11
  2561. CRT,RUN,MODE_CONTROL,0x02
  2562. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2563. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  2564. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2565. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2566. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2567. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2568. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2569. # Lock CRTC Reg 11 for compatibility
  2570. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2571. # Dump ENG Register
  2572. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2573. # Dump MISCOUT Register
  2574. DIR,RUN,MISC_WRITE,0xef
  2575. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2576. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2577. CLK_IND, RUN, FREQ_2, 0x88
  2578. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2579. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2580. CRT,RUN,LATCH_DATA, 0x08
  2581.  
  2582. [1024,768,8,48,60]
  2583. # Unlock CRTC
  2584. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2585. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2586. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2587. # Dump CRT Controller Registers
  2588. CRT,RUN,HORZ_TOTAL,0x4f,0x3f,0x40,0x12,0x41,0x0a,0x24,0xf5,0x00,0x60
  2589. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2590. CRT,RUN,VERT_RETRACE_START,0x02,0x08,0xff
  2591. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  2592. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2593. CRT,RUN,MISC_1,0x15,0x48,0x25,0x11
  2594. CRT,RUN,MODE_CONTROL,0x02
  2595. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2596. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  2597. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2598. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2599. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2600. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2601. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2602. # Lock CRTC Reg 11 for compatibility
  2603. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2604. # Dump ENG Register
  2605. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2606. # Dump MISCOUT Register
  2607. DIR,RUN,MISC_WRITE,0xef
  2608. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2609. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2610. CLK_IND, RUN, FREQ_2, 0x7e
  2611. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2612. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2613. CRT,RUN,LATCH_DATA, 0x08
  2614.  
  2615. [800,600,32,75,120]
  2616. # Unlock CRTC
  2617. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2618. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2619. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2620. # Dump CRT Controller Registers
  2621. CRT,RUN,HORZ_TOTAL,0x39,0x33,0x31,0x00,0x32,0x1a,0x83,0xf0,0x00,0x60
  2622. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2623. CRT,RUN,VERT_RETRACE_START,0x5a,0x0c,0x57
  2624. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2625. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  2626. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  2627. CRT,RUN,MODE_CONTROL,0x02
  2628. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2629. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  2630. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2631. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2632. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2633. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x05,0xae,0x00,0x00
  2634. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2635. # Lock CRTC Reg 11 for compatibility
  2636. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2637. # Dump ENG Register
  2638. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2639. # Dump MISCOUT Register
  2640. DIR,RUN,MISC_WRITE,0xef
  2641. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2642. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2643. CLK_IND, RUN, FREQ_2, 0x8a
  2644. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2645. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2646. CRT,RUN,LATCH_DATA, 0x00
  2647.  
  2648. [800,600,32,64,100]
  2649. # Unlock CRTC
  2650. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2651. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2652. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2653. # Dump CRT Controller Registers
  2654. CRT,RUN,HORZ_TOTAL,0x3a,0x33,0x31,0x00,0x34,0x1a,0x82,0xf0,0x00,0x60
  2655. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2656. CRT,RUN,VERT_RETRACE_START,0x63,0x02,0x57
  2657. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2658. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  2659. CRT,RUN,MISC_1,0x15,0x33,0x1e,0x11
  2660. CRT,RUN,MODE_CONTROL,0x02
  2661. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2662. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  2663. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2664. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2665. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2666. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x05,0xae,0x00,0x00
  2667. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2668. # Lock CRTC Reg 11 for compatibility
  2669. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2670. # Dump ENG Register
  2671. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2672. # Dump MISCOUT Register
  2673. DIR,RUN,MISC_WRITE,0xef
  2674. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2675. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2676. CLK_IND, RUN, FREQ_2, 0x7e
  2677. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2678. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2679. CRT,RUN,LATCH_DATA, 0x00
  2680.  
  2681. [800,600,32,56,90]
  2682. # Unlock CRTC
  2683. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2684. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2685. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2686. # Dump CRT Controller Registers
  2687. CRT,RUN,HORZ_TOTAL,0x3b,0x33,0x31,0x00,0x34,0x1a,0x72,0xf0,0x00,0x60
  2688. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2689. CRT,RUN,VERT_RETRACE_START,0x60,0x02,0x57
  2690. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2691. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  2692. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  2693. CRT,RUN,MODE_CONTROL,0x02
  2694. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2695. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  2696. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2697. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2698. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2699. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x05,0xae,0x00,0x00
  2700. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2701. # Lock CRTC Reg 11 for compatibility
  2702. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2703. # Dump ENG Register
  2704. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2705. # Dump MISCOUT Register
  2706. DIR,RUN,MISC_WRITE,0xef
  2707. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2708. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2709. CLK_IND, RUN, FREQ_2, 0x70
  2710. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2711. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2712. CRT,RUN,LATCH_DATA, 0x00
  2713.  
  2714. [800,600,32,46,75]
  2715. # Unlock CRTC
  2716. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2717. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2718. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2719. # Dump CRT Controller Registers
  2720. CRT,RUN,HORZ_TOTAL,0x3d,0x33,0x31,0x00,0x33,0x18,0x6f,0xe0,0x00,0x60
  2721. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2722. CRT,RUN,VERT_RETRACE_START,0x58,0x0b,0x57
  2723. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2724. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  2725. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  2726. CRT,RUN,MODE_CONTROL,0x02
  2727. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2728. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  2729. CRT,RUN,EXT_HORZ_OVERFLOW,0x08
  2730. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2731. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2732. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x05,0xae,0x00,0x00
  2733. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2734. # Lock CRTC Reg 11 for compatibility
  2735. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2736. # Dump ENG Register
  2737. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2738. # Dump MISCOUT Register
  2739. DIR,RUN,MISC_WRITE,0xef
  2740. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2741. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2742. CLK_IND, RUN, FREQ_2, 0x60
  2743. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2744. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2745. CRT,RUN,LATCH_DATA, 0x00
  2746.  
  2747. [800,600,32,48,72]
  2748. # Unlock CRTC
  2749. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2750. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2751. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2752. # Dump CRT Controller Registers
  2753. CRT,RUN,HORZ_TOTAL,0x3c,0x33,0x31,0x00,0x35,0x1d,0x98,0xf0,0x00,0x60
  2754. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2755. CRT,RUN,VERT_RETRACE_START,0x7c,0x22,0x57
  2756. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2757. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  2758. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  2759. CRT,RUN,MODE_CONTROL,0x02
  2760. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2761. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  2762. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2763. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2764. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2765. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x05,0xae,0x00,0x00
  2766. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2767. # Lock CRTC Reg 11 for compatibility
  2768. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2769. # Dump ENG Register
  2770. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2771. # Dump MISCOUT Register
  2772. DIR,RUN,MISC_WRITE,0xef
  2773. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2774. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2775. CLK_IND, RUN, FREQ_2, 0x61
  2776. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2777. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2778. CRT,RUN,LATCH_DATA, 0x00
  2779.  
  2780. [800,600,32,35,56]
  2781. # Unlock CRTC
  2782. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2783. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2784. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2785. # Dump CRT Controller Registers
  2786. CRT,RUN,HORZ_TOTAL,0x3b,0x33,0x31,0x00,0x33,0x18,0x6f,0xf0,0x00,0x60
  2787. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2788. CRT,RUN,VERT_RETRACE_START,0x58,0x0a,0x57
  2789. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2790. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  2791. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  2792. CRT,RUN,MODE_CONTROL,0x02
  2793. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2794. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  2795. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2796. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2797. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2798. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x05,0xae,0x00,0x00
  2799. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2800. # Lock CRTC Reg 11 for compatibility
  2801. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2802. # Dump ENG Register
  2803. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2804. # Dump MISCOUT Register
  2805. DIR,RUN,MISC_WRITE,0xef
  2806. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2807. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2808. CLK_IND, RUN, FREQ_2, 0x45
  2809. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2810. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2811. CRT,RUN,LATCH_DATA, 0x00
  2812.  
  2813. [800,600,32,37,60]
  2814. # Unlock CRTC
  2815. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2816. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2817. CRT,RUN,REG_LOCK_1,0x48,0xA5
  2818. # Dump CRT Controller Registers
  2819. CRT,RUN,HORZ_TOTAL,0x3d,0x33,0x31,0x00,0x34,0x1c,0x72,0xf0,0x00,0x60
  2820. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2821. CRT,RUN,VERT_RETRACE_START,0x58,0x0c,0x57
  2822. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2823. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  2824. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  2825. CRT,RUN,MODE_CONTROL,0x02
  2826. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2827. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  2828. CRT,RUN,EXT_HORZ_OVERFLOW,0x08
  2829. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2830. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2831. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x05,0xae,0x00,0x00
  2832. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2833. # Lock CRTC Reg 11 for compatibility
  2834. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2835. # Dump ENG Register
  2836. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2837. # Dump MISCOUT Register
  2838. DIR,RUN,MISC_WRITE,0xef
  2839. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2840. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2841. CLK_IND, RUN, FREQ_2, 0x4D
  2842. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2843. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2844. CRT,RUN,LATCH_DATA, 0x00
  2845.  
  2846. [800,600,24,75,120]
  2847. # Unlock CRTC
  2848. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2849. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2850. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2851. # Dump CRT Controller Registers
  2852. CRT,RUN,HORZ_TOTAL,0x58,0x4c,0x4a,0x00,0x4b,0x14,0x82,0xf0,0x00,0x60
  2853. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2854. CRT,RUN,VERT_RETRACE_START,0x59,0x0b,0x57
  2855. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2856. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  2857. CRT,RUN,MISC_1,0x15,0x73,0x21,0x11
  2858. CRT,RUN,MODE_CONTROL,0x02
  2859. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2860. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  2861. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2862. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2863. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2864. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  2865. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2866. # Lock CRTC Reg 11 for compatibility
  2867. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2868. # Dump ENG Register
  2869. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2870. # Dump MISCOUT Register
  2871. DIR,RUN,MISC_WRITE,0xef
  2872. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2873. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2874. CLK_IND, RUN, FREQ_2, 0x8a
  2875. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2876. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2877. CRT,RUN,LATCH_DATA, 0x00
  2878.  
  2879.  
  2880. [800,600,24,64,100]
  2881. # Unlock CRTC
  2882. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2883. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2884. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2885. # Dump CRT Controller Registers
  2886. CRT,RUN,HORZ_TOTAL,0x5b,0x4c,0x4a,0x00,0x4d,0x16,0x7a,0xf0,0x00,0x60
  2887. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2888. CRT,RUN,VERT_RETRACE_START,0x59,0x08,0x57
  2889. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2890. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  2891. CRT,RUN,MISC_1,0x15,0x58,0x2f,0x11
  2892. CRT,RUN,MODE_CONTROL,0x02
  2893. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2894. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  2895. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2896. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2897. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2898. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  2899. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2900. # Lock CRTC Reg 11 for compatibility
  2901. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2902. # Dump ENG Register
  2903. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2904. # Dump MISCOUT Register
  2905. DIR,RUN,MISC_WRITE,0xef
  2906. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2907. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2908. CLK_IND, RUN, FREQ_2, 0x7e
  2909. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2910. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2911. CRT,RUN,LATCH_DATA, 0x00
  2912.  
  2913.  
  2914. [800,600,24,56,90]
  2915. # Unlock CRTC
  2916. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2917. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2918. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2919. # Dump CRT Controller Registers
  2920. CRT,RUN,HORZ_TOTAL,0x5b,0x4c,0x4a,0x00,0x4f,0x1b,0x6f,0xf0,0x00,0x60
  2921. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2922. CRT,RUN,VERT_RETRACE_START,0x57,0x09,0x57
  2923. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2924. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  2925. CRT,RUN,MISC_1,0x15,0x55,0x2f,0x11
  2926. CRT,RUN,MODE_CONTROL,0x02
  2927. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2928. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  2929. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2930. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2931. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2932. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  2933. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2934. # Lock CRTC Reg 11 for compatibility
  2935. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2936. # Dump ENG Register
  2937. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2938. # Dump MISCOUT Register
  2939. DIR,RUN,MISC_WRITE,0xef
  2940. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2941. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2942. CLK_IND, RUN, FREQ_2, 0x70
  2943. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2944. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2945. CRT,RUN,LATCH_DATA, 0x00
  2946.  
  2947.  
  2948. [800,600,24,46,75]
  2949. # Unlock CRTC
  2950. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2951. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2952. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2953. # Dump CRT Controller Registers
  2954. CRT,RUN,HORZ_TOTAL,0x5e,0x4c,0x4a,0x00,0x52,0x1a,0x6f,0xe0,0x00,0x60
  2955. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2956. CRT,RUN,VERT_RETRACE_START,0x58,0x0b,0x57
  2957. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2958. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  2959. CRT,RUN,MISC_1,0x15,0x58,0x2f,0x11
  2960. CRT,RUN,MODE_CONTROL,0x02
  2961. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2962. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  2963. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2964. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2965. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2966. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  2967. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2968. # Lock CRTC Reg 11 for compatibility
  2969. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2970. # Dump ENG Register
  2971. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2972. # Dump MISCOUT Register
  2973. DIR,RUN,MISC_WRITE,0xef
  2974. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2975. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2976. CLK_IND, RUN, FREQ_2, 0x60
  2977. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2978. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2979. CRT,RUN,LATCH_DATA, 0x00
  2980.  
  2981.  
  2982. [800,600,24,48,72]
  2983. # Unlock CRTC
  2984. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2985. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2986. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2987. # Dump CRT Controller Registers
  2988. CRT,RUN,HORZ_TOTAL,0x5e,0x4c,0x4a,0x00,0x4f,0x1b,0x8e,0xf0,0x00,0x60
  2989. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2990. CRT,RUN,VERT_RETRACE_START,0x71,0x27,0x57
  2991. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2992. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  2993. CRT,RUN,MISC_1,0x15,0x58,0x2f,0x11
  2994. CRT,RUN,MODE_CONTROL,0x02
  2995. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2996. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  2997. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2998. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2999. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3000. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  3001. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3002. # Lock CRTC Reg 11 for compatibility
  3003. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3004. # Dump ENG Register
  3005. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3006. # Dump MISCOUT Register
  3007. DIR,RUN,MISC_WRITE,0xef
  3008. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3009. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3010. CLK_IND, RUN, FREQ_2, 0x61
  3011. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3012. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3013. CRT,RUN,LATCH_DATA, 0x00
  3014.  
  3015. [800,600,24,37,60]
  3016. # Unlock CRTC
  3017. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3018. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3019. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3020. # Dump CRT Controller Registers
  3021. CRT,RUN,HORZ_TOTAL,0x5e,0x4c,0x4a,0x00,0x4f,0x1b,0x72,0xf0,0x00,0x60
  3022. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3023. CRT,RUN,VERT_RETRACE_START,0x58,0x0c,0x57
  3024. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3025. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  3026. CRT,RUN,MISC_1,0x15,0x58,0x2f,0x11
  3027. CRT,RUN,MODE_CONTROL,0x02
  3028. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3029. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  3030. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3031. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3032. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3033. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  3034. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3035. # Lock CRTC Reg 11 for compatibility
  3036. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3037. # Dump ENG Register
  3038. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3039. # Dump MISCOUT Register
  3040. DIR,RUN,MISC_WRITE,0xef
  3041. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3042. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3043. CLK_IND, RUN, FREQ_2, 0x4d
  3044. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3045. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3046. CRT,RUN,LATCH_DATA, 0x00
  3047.  
  3048.  
  3049. [800,600,24,35,56]
  3050. # Unlock CRTC
  3051. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3052. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3053. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3054. # Dump CRT Controller Registers
  3055. CRT,RUN,HORZ_TOTAL,0x5b,0x4c,0x4a,0x00,0x4f,0x18,0x72,0xf0,0x00,0x60
  3056. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3057. CRT,RUN,VERT_RETRACE_START,0x58,0x0c,0x57
  3058. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3059. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  3060. CRT,RUN,MISC_1,0x15,0x58,0x2f,0x11
  3061. CRT,RUN,MODE_CONTROL,0x02
  3062. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3063. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  3064. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3065. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3066. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3067. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  3068. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3069. # Lock CRTC Reg 11 for compatibility
  3070. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3071. # Dump ENG Register
  3072. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3073. # Dump MISCOUT Register
  3074. DIR,RUN,MISC_WRITE,0xef
  3075. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3076. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3077. CLK_IND, RUN, FREQ_2, 0x45
  3078. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3079. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3080. CRT,RUN,LATCH_DATA, 0x00
  3081.  
  3082.  
  3083.  
  3084. [800,600,16,75,120]
  3085. # Unlock CRTC
  3086. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3087. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3088. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3089. # Dump CRT Controller Registers
  3090. CRT,RUN,HORZ_TOTAL,0x39,0x33,0x31,0x00,0x32,0x1a,0x83,0xf0,0x00,0x60
  3091. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3092. CRT,RUN,VERT_RETRACE_START,0x5a,0x0c,0x57
  3093. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3094. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  3095. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  3096. CRT,RUN,MODE_CONTROL,0x02
  3097. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3098. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  3099. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3100. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3101. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3102. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xae,0x00,0x00
  3103. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3104. # Lock CRTC Reg 11 for compatibility
  3105. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3106. # Dump ENG Register
  3107. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3108. # Dump MISCOUT Register
  3109. DIR,RUN,MISC_WRITE,0xef
  3110. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3111. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3112. CLK_IND, RUN, FREQ_2, 0x8a
  3113. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3114. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3115. CRT,RUN,LATCH_DATA, 0x00
  3116.  
  3117. [800,600,16,64,100]
  3118. # Unlock CRTC
  3119. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3120. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3121. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3122. # Dump CRT Controller Registers
  3123. CRT,RUN,HORZ_TOTAL,0x3a,0x33,0x31,0x00,0x34,0x1a,0x82,0xf0,0x00,0x60
  3124. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3125. CRT,RUN,VERT_RETRACE_START,0x63,0x02,0x57
  3126. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3127. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  3128. CRT,RUN,MISC_1,0x15,0x33,0x1e,0x11
  3129. CRT,RUN,MODE_CONTROL,0x02
  3130. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3131. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  3132. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3133. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3134. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3135. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xae,0x00,0x00
  3136. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3137. # Lock CRTC Reg 11 for compatibility
  3138. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3139. # Dump ENG Register
  3140. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3141. # Dump MISCOUT Register
  3142. DIR,RUN,MISC_WRITE,0xef
  3143. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3144. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3145. CLK_IND, RUN, FREQ_2, 0x7e
  3146. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3147. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3148. CRT,RUN,LATCH_DATA, 0x00
  3149.  
  3150. [800,600,16,56,90]
  3151. # Unlock CRTC
  3152. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3153. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3154. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3155. # Dump CRT Controller Registers
  3156. CRT,RUN,HORZ_TOTAL,0x3b,0x33,0x31,0x00,0x34,0x1a,0x72,0xf0,0x00,0x60
  3157. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3158. CRT,RUN,VERT_RETRACE_START,0x60,0x02,0x57
  3159. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3160. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  3161. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  3162. CRT,RUN,MODE_CONTROL,0x02
  3163. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3164. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  3165. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3166. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3167. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3168. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xae,0x00,0x00
  3169. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3170. # Lock CRTC Reg 11 for compatibility
  3171. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3172. # Dump ENG Register
  3173. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3174. # Dump MISCOUT Register
  3175. DIR,RUN,MISC_WRITE,0xef
  3176. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3177. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3178. CLK_IND, RUN, FREQ_2, 0x70
  3179. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3180. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3181. CRT,RUN,LATCH_DATA, 0x00
  3182.  
  3183. [800,600,16,46,75]
  3184. # Unlock CRTC
  3185. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3186. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3187. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3188. # Dump CRT Controller Registers
  3189. CRT,RUN,HORZ_TOTAL,0x3d,0x33,0x31,0x00,0x33,0x18,0x6f,0xe0,0x00,0x60
  3190. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3191. CRT,RUN,VERT_RETRACE_START,0x58,0x0b,0x57
  3192. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3193. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  3194. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  3195. CRT,RUN,MODE_CONTROL,0x02
  3196. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3197. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  3198. CRT,RUN,EXT_HORZ_OVERFLOW,0x08
  3199. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3200. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3201. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xae,0x00,0x00
  3202. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3203. # Lock CRTC Reg 11 for compatibility
  3204. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3205. # Dump ENG Register
  3206. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3207. # Dump MISCOUT Register
  3208. DIR,RUN,MISC_WRITE,0xef
  3209. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3210. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3211. CLK_IND, RUN, FREQ_2, 0x60
  3212. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3213. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3214. CRT,RUN,LATCH_DATA, 0x00
  3215.  
  3216. [800,600,16,48,72]
  3217. # Unlock CRTC
  3218. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3219. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3220. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3221. # Dump CRT Controller Registers
  3222. CRT,RUN,HORZ_TOTAL,0x3c,0x33,0x31,0x00,0x35,0x1d,0x98,0xf0,0x00,0x60
  3223. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3224. CRT,RUN,VERT_RETRACE_START,0x7c,0x22,0x57
  3225. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3226. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  3227. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  3228. CRT,RUN,MODE_CONTROL,0x02
  3229. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3230. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  3231. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3232. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3233. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3234. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xae,0x00,0x00
  3235. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3236. # Lock CRTC Reg 11 for compatibility
  3237. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3238. # Dump ENG Register
  3239. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3240. # Dump MISCOUT Register
  3241. DIR,RUN,MISC_WRITE,0xef
  3242. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3243. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3244. CLK_IND, RUN, FREQ_2, 0x61
  3245. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3246. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3247. CRT,RUN,LATCH_DATA, 0x00
  3248.  
  3249. [800,600,16,35,56]
  3250. # Unlock CRTC
  3251. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3252. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3253. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3254. # Dump CRT Controller Registers
  3255. CRT,RUN,HORZ_TOTAL,0x3b,0x33,0x31,0x00,0x33,0x18,0x6f,0xf0,0x00,0x60
  3256. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3257. CRT,RUN,VERT_RETRACE_START,0x58,0x0a,0x57
  3258. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3259. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  3260. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  3261. CRT,RUN,MODE_CONTROL,0x02
  3262. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3263. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  3264. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3265. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3266. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3267. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xae,0x00,0x00
  3268. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3269. # Lock CRTC Reg 11 for compatibility
  3270. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3271. # Dump ENG Register
  3272. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3273. # Dump MISCOUT Register
  3274. DIR,RUN,MISC_WRITE,0xef
  3275. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3276. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3277. CLK_IND, RUN, FREQ_2, 0x45
  3278. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3279. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3280. CRT,RUN,LATCH_DATA, 0x00
  3281.  
  3282. [800,600,16,37,60]
  3283. # Unlock CRTC
  3284. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3285. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3286. CRT,RUN,REG_LOCK_1,0x48,0xA5
  3287. # Dump CRT Controller Registers
  3288. CRT,RUN,HORZ_TOTAL,0x3d,0x33,0x31,0x00,0x34,0x1c,0x72,0xf0,0x00,0x60
  3289. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3290. CRT,RUN,VERT_RETRACE_START,0x58,0x0c,0x57
  3291. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3292. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  3293. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  3294. CRT,RUN,MODE_CONTROL,0x02
  3295. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3296. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  3297. CRT,RUN,EXT_HORZ_OVERFLOW,0x08
  3298. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3299. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3300. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xae,0x00,0x00
  3301. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3302. # Lock CRTC Reg 11 for compatibility
  3303. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3304. # Dump ENG Register
  3305. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3306. # Dump MISCOUT Register
  3307. DIR,RUN,MISC_WRITE,0xef
  3308. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3309. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3310. CLK_IND, RUN, FREQ_2, 0x4D
  3311. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3312. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3313. CRT,RUN,LATCH_DATA, 0x00
  3314.  
  3315. [800,600,8,75,120]
  3316. # Unlock CRTC
  3317. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3318. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3319. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3320. # Dump CRT Controller Registers
  3321. CRT,RUN,HORZ_TOTAL,0x39,0x31,0x31,0x00,0x32,0x1a,0x83,0xf0,0x00,0x60
  3322. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3323. CRT,RUN,VERT_RETRACE_START,0x5a,0x0c,0x57
  3324. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3325. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3326. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  3327. CRT,RUN,MODE_CONTROL,0x02
  3328. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3329. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  3330. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3331. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3332. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3333. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3334. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3335. # Lock CRTC Reg 11 for compatibility
  3336. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3337. # Dump ENG Register
  3338. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3339. # Dump MISCOUT Register
  3340. DIR,RUN,MISC_WRITE,0xef
  3341. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3342. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3343. CLK_IND, RUN, FREQ_2, 0x8a
  3344. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3345. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3346. CRT,RUN,LATCH_DATA, 0x08
  3347.  
  3348. [800,600,8,64,100]
  3349. # Unlock CRTC
  3350. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3351. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3352. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3353. # Dump CRT Controller Registers
  3354. CRT,RUN,HORZ_TOTAL,0x3a,0x31,0x31,0x00,0x34,0x1a,0x82,0xf0,0x00,0x60
  3355. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3356. CRT,RUN,VERT_RETRACE_START,0x63,0x02,0x57
  3357. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3358. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3359. CRT,RUN,MISC_1,0x15,0x33,0x1e,0x11
  3360. CRT,RUN,MODE_CONTROL,0x02
  3361. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3362. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  3363. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3364. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3365. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3366. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3367. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3368. # Lock CRTC Reg 11 for compatibility
  3369. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3370. # Dump ENG Register
  3371. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3372. # Dump MISCOUT Register
  3373. DIR,RUN,MISC_WRITE,0xef
  3374. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3375. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3376. CLK_IND, RUN, FREQ_2, 0x7e
  3377. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3378. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3379. CRT,RUN,LATCH_DATA, 0x08
  3380.  
  3381. [800,600,8,56,90]
  3382. # Unlock CRTC
  3383. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3384. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3385. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3386. # Dump CRT Controller Registers
  3387. CRT,RUN,HORZ_TOTAL,0x3b,0x31,0x31,0x00,0x34,0x1a,0x72,0xf0,0x00,0x60
  3388. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3389. CRT,RUN,VERT_RETRACE_START,0x60,0x02,0x57
  3390. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3391. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3392. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  3393. CRT,RUN,MODE_CONTROL,0x02
  3394. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3395. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  3396. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3397. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3398. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3399. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3400. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3401. # Lock CRTC Reg 11 for compatibility
  3402. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3403. # Dump ENG Register
  3404. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3405. # Dump MISCOUT Register
  3406. DIR,RUN,MISC_WRITE,0xef
  3407. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3408. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3409. CLK_IND, RUN, FREQ_2, 0x70
  3410. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3411. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3412. CRT,RUN,LATCH_DATA, 0x08
  3413.  
  3414. [800,600,8,46,75]
  3415. # Unlock CRTC
  3416. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3417. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3418. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3419. # Dump CRT Controller Registers
  3420. CRT,RUN,HORZ_TOTAL,0x3d,0x31,0x31,0x00,0x33,0x18,0x6f,0xe0,0x00,0x60
  3421. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3422. CRT,RUN,VERT_RETRACE_START,0x58,0x0b,0x57
  3423. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3424. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3425. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  3426. CRT,RUN,MODE_CONTROL,0x02
  3427. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3428. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  3429. CRT,RUN,EXT_HORZ_OVERFLOW,0x08
  3430. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3431. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3432. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3433. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3434. # Lock CRTC Reg 11 for compatibility
  3435. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3436. # Dump ENG Register
  3437. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3438. # Dump MISCOUT Register
  3439. DIR,RUN,MISC_WRITE,0xef
  3440. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3441. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3442. CLK_IND, RUN, FREQ_2, 0x60
  3443. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3444. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3445. CRT,RUN,LATCH_DATA, 0x08
  3446.  
  3447. [800,600,8,48,72]
  3448. # Unlock CRTC
  3449. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3450. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3451. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3452. # Dump CRT Controller Registers
  3453. CRT,RUN,HORZ_TOTAL,0x3c,0x31,0x31,0x00,0x35,0x1d,0x98,0xf0,0x00,0x60
  3454. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3455. CRT,RUN,VERT_RETRACE_START,0x7c,0x22,0x57
  3456. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3457. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3458. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  3459. CRT,RUN,MODE_CONTROL,0x02
  3460. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3461. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  3462. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3463. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3464. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3465. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3466. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3467. # Lock CRTC Reg 11 for compatibility
  3468. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3469. # Dump ENG Register
  3470. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3471. # Dump MISCOUT Register
  3472. DIR,RUN,MISC_WRITE,0xef
  3473. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3474. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3475. CLK_IND, RUN, FREQ_2, 0x61
  3476. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3477. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3478. CRT,RUN,LATCH_DATA, 0x08
  3479.  
  3480. [800,600,8,37,60]
  3481. # Unlock CRTC
  3482. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3483. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3484. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3485. # Dump CRT Controller Registers
  3486. CRT,RUN,HORZ_TOTAL,0x3d,0x31,0x31,0x00,0x34,0x1c,0x72,0xf0,0x00,0x60
  3487. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3488. CRT,RUN,VERT_RETRACE_START,0x58,0x0c,0x57
  3489. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3490. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3491. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  3492. CRT,RUN,MODE_CONTROL,0x02
  3493. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3494. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  3495. CRT,RUN,EXT_HORZ_OVERFLOW,0x08
  3496. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3497. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3498. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3499. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3500. # Lock CRTC Reg 11 for compatibility
  3501. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3502. # Dump ENG Register
  3503. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3504. # Dump MISCOUT Register
  3505. DIR,RUN,MISC_WRITE,0xef
  3506. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3507. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3508. CLK_IND, RUN, FREQ_2, 0x4D
  3509. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3510. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3511. CRT,RUN,LATCH_DATA, 0x08
  3512.  
  3513. [800,600,8,35,56]
  3514. # Unlock CRTC
  3515. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3516. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3517. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3518. # Dump CRT Controller Registers
  3519. CRT,RUN,HORZ_TOTAL,0x3b,0x31,0x31,0x00,0x33,0x18,0x6f,0xf0,0x00,0x60
  3520. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3521. CRT,RUN,VERT_RETRACE_START,0x58,0x0a,0x57
  3522. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3523. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3524. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  3525. CRT,RUN,MODE_CONTROL,0x02
  3526. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3527. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  3528. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3529. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3530. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3531. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3532. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3533. # Lock CRTC Reg 11 for compatibility
  3534. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3535. # Dump ENG Register
  3536. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3537. # Dump MISCOUT Register
  3538. DIR,RUN,MISC_WRITE,0xef
  3539. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3540. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3541. CLK_IND, RUN, FREQ_2, 0x45
  3542. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3543. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3544. CRT,RUN,LATCH_DATA, 0x08
  3545.  
  3546. [640,480,32,64,120]
  3547. # Unlock CRTC
  3548. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3549. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3550. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3551. # Dump CRT Controller Registers
  3552. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x12,0x29,0x0f,0x14,0x3e,0x00,0x40
  3553. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3554. CRT,RUN,VERT_RETRACE_START,0xef,0x0c,0xdf
  3555. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0e,0xab,0xff
  3556. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  3557. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  3558. CRT,RUN,MODE_CONTROL,0x02
  3559. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3560. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  3561. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3562. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3563. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3564. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xae,0x00,0x00
  3565. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3566. # Lock CRTC Reg 11 for compatibility
  3567. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3568. # Dump ENG Register
  3569. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3570. # Dump MISCOUT Register
  3571. DIR,RUN,MISC_WRITE,0xef
  3572. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3573. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3574. CLK_IND, RUN, FREQ_2, 0x67
  3575. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3576. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3577. CRT,RUN,LATCH_DATA, 0x00
  3578.  
  3579. [640,480,32,52,100]
  3580. # Unlock CRTC
  3581. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3582. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3583. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3584. # Dump CRT Controller Registers
  3585. CRT,RUN,HORZ_TOTAL,0x2d,0x27,0x28,0x10,0x29,0x0f,0x05,0x3e,0x00,0x40
  3586. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3587. CRT,RUN,VERT_RETRACE_START,0xec,0x01,0xdf
  3588. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0xff,0xab,0xff
  3589. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  3590. CRT,RUN,MISC_1,0x15,0x28,0x16,0x11
  3591. CRT,RUN,MODE_CONTROL,0x02
  3592. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3593. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  3594. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3595. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3596. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3597. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xae,0x00,0x00
  3598. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3599. # Lock CRTC Reg 11 for compatibility
  3600. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3601. # Dump ENG Register
  3602. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3603. # Dump MISCOUT Register
  3604. DIR,RUN,MISC_WRITE,0xef
  3605. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3606. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3607. CLK_IND, RUN, FREQ_2, 0x50
  3608. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3609. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3610. CRT,RUN,LATCH_DATA, 0x00
  3611.  
  3612. [640,480,32,48,90]
  3613. # Unlock CRTC
  3614. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3615. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3616. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3617. # Dump CRT Controller Registers
  3618. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x12,0x29,0x0f,0x14,0x3e,0x00,0x40
  3619. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3620. CRT,RUN,VERT_RETRACE_START,0xf7,0x01,0xdf
  3621. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x12,0xab,0xff
  3622. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  3623. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  3624. CRT,RUN,MODE_CONTROL,0x02
  3625. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3626. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  3627. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3628. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3629. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3630. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xae,0x00,0x00
  3631. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3632. # Lock CRTC Reg 11 for compatibility
  3633. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3634. # Dump ENG Register
  3635. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3636. # Dump MISCOUT Register
  3637. DIR,RUN,MISC_WRITE,0xef
  3638. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3639. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3640. CLK_IND, RUN, FREQ_2, 0x4d
  3641. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3642. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3643. CRT,RUN,LATCH_DATA, 0x00
  3644.  
  3645. [640,480,32,37,75]
  3646. # Unlock CRTC
  3647. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3648. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3649. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3650. # Dump CRT Controller Registers
  3651. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x13,0x29,0x0d,0xf6,0x1f,0x00,0x40
  3652. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3653. CRT,RUN,VERT_RETRACE_START,0xe0,0x03,0xdf
  3654. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0xf6,0xab,0xff
  3655. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  3656. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  3657. CRT,RUN,MODE_CONTROL,0x02
  3658. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3659. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  3660. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3661. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3662. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3663. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xae,0x00,0x00
  3664. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3665. # Lock CRTC Reg 11 for compatibility
  3666. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3667. # Dump ENG Register
  3668. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3669. # Dump MISCOUT Register
  3670. DIR,RUN,MISC_WRITE,0xef
  3671. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3672. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3673. CLK_IND, RUN, FREQ_2, 0x3a
  3674. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3675. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3676. CRT,RUN,LATCH_DATA, 0x00
  3677.  
  3678. [640,480,32,37,72]
  3679. # Unlock CRTC
  3680. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3681. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3682. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3683. # Dump CRT Controller Registers
  3684. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x13,0x29,0x0c,0x06,0x3e,0x00,0x40
  3685. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3686. CRT,RUN,VERT_RETRACE_START,0xe8,0x0b,0xdf
  3687. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x06,0xab,0xff
  3688. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  3689. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  3690. CRT,RUN,MODE_CONTROL,0x02
  3691. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3692. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  3693. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3694. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3695. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3696. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xae,0x00,0x00
  3697. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3698. # Lock CRTC Reg 11 for compatibility
  3699. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3700. # Dump ENG Register
  3701. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3702. # Dump MISCOUT Register
  3703. DIR,RUN,MISC_WRITE,0xef
  3704. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3705. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3706. CLK_IND, RUN, FREQ_2, 0x3a
  3707. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3708. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3709. CRT,RUN,LATCH_DATA, 0x00
  3710.  
  3711. [640,480,32,31,60]
  3712. # Unlock CRTC
  3713. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3714. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3715. CRT,RUN,REG_LOCK_1,0x48,0xA5
  3716. # Dump CRT Controller Registers
  3717. CRT,RUN,HORZ_TOTAL,0x2d,0x27,0x28,0x10,0x29,0x0f,0x0b,0x3e,0x00,0x40
  3718. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3719. CRT,RUN,VERT_RETRACE_START,0xe9,0x0b,0xdf
  3720. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0b,0xab,0xff
  3721. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  3722. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  3723. CRT,RUN,MODE_CONTROL,0x02
  3724. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3725. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  3726. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3727. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3728. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3729. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xae,0x00,0x00
  3730. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3731. # Lock CRTC Reg 11 for compatibility
  3732. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3733. # Dump ENG Register
  3734. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3735. # Dump MISCOUT Register
  3736. DIR,RUN,MISC_WRITE,0xef
  3737. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3738. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3739. CLK_IND, RUN, FREQ_2, 0x21
  3740. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3741. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3742. CRT,RUN,LATCH_DATA, 0x00
  3743.  
  3744. [640,480,24,64,120]
  3745. # Unlock CRTC
  3746. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3747. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3748. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3749. # Dump CRT Controller Registers
  3750. CRT,RUN,HORZ_TOTAL,0x49,0x3b,0x3c,0x8e,0x3e,0x04,0x12,0x3e,0x00,0x40
  3751. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3752. CRT,RUN,VERT_RETRACE_START,0xef,0x0c,0xdf
  3753. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0c,0xab,0xff
  3754. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  3755. CRT,RUN,MISC_1,0x15,0x58,0x24,0x11
  3756. CRT,RUN,MODE_CONTROL,0x02
  3757. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3758. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  3759. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3760. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3761. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3762. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  3763. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3764. # Lock CRTC Reg 11 for compatibility
  3765. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3766. # Dump ENG Register
  3767. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3768. # Dump MISCOUT Register
  3769. DIR,RUN,MISC_WRITE,0xef
  3770. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3771. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3772. CLK_IND, RUN, FREQ_2, 0x67
  3773. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3774. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3775. CRT,RUN,LATCH_DATA, 0x00
  3776.  
  3777.  
  3778. [640,480,24,52,100]
  3779. # Unlock CRTC
  3780. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3781. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3782. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3783. # Dump CRT Controller Registers
  3784. CRT,RUN,HORZ_TOTAL,0x46,0x3b,0x3c,0x8b,0x3d,0x03,0x06,0x3e,0x00,0x40
  3785. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3786. CRT,RUN,VERT_RETRACE_START,0xec,0x01,0xdf
  3787. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x00,0xab,0xff
  3788. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  3789. CRT,RUN,MISC_1,0x15,0x43,0x24,0x11
  3790. CRT,RUN,MODE_CONTROL,0x02
  3791. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3792. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  3793. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3794. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3795. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3796. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  3797. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3798. # Lock CRTC Reg 11 for compatibility
  3799. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3800. # Dump ENG Register
  3801. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3802. # Dump MISCOUT Register
  3803. DIR,RUN,MISC_WRITE,0xef
  3804. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3805. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3806. CLK_IND, RUN, FREQ_2, 0x50
  3807. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3808. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3809. CRT,RUN,LATCH_DATA, 0x00
  3810.  
  3811. [640,480,24,48,90]
  3812. # Unlock CRTC
  3813. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3814. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3815. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3816. # Dump CRT Controller Registers
  3817. CRT,RUN,HORZ_TOTAL,0x49,0x3b,0x3c,0x8e,0x3d,0x03,0x14,0x3e,0x00,0x40
  3818. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3819. CRT,RUN,VERT_RETRACE_START,0xf7,0x01,0xdf
  3820. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x12,0xab,0xff
  3821. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  3822. CRT,RUN,MISC_1,0x15,0x43,0x24,0x11
  3823. CRT,RUN,MODE_CONTROL,0x02
  3824. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3825. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  3826. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3827. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3828. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3829. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  3830. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3831. # Lock CRTC Reg 11 for compatibility
  3832. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3833. # Dump ENG Register
  3834. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3835. # Dump MISCOUT Register
  3836. DIR,RUN,MISC_WRITE,0xef
  3837. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3838. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3839. CLK_IND, RUN, FREQ_2, 0x4d
  3840. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3841. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3842. CRT,RUN,LATCH_DATA, 0x00
  3843.  
  3844.  
  3845. [640,480,24,37,75]
  3846. # Unlock CRTC
  3847. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3848. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3849. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3850. # Dump CRT Controller Registers
  3851. CRT,RUN,HORZ_TOTAL,0x49,0x3b,0x3c,0x8d,0x40,0x04,0xf7,0x1f,0x00,0x40
  3852. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3853. CRT,RUN,VERT_RETRACE_START,0xe6,0x09,0xdf
  3854. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0xf7,0xab,0xff
  3855. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  3856. CRT,RUN,MISC_1,0x15,0x43,0x24,0x11
  3857. CRT,RUN,MODE_CONTROL,0x02
  3858. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3859. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  3860. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3861. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3862. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3863. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  3864. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3865. # Lock CRTC Reg 11 for compatibility
  3866. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3867. # Dump ENG Register
  3868. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3869. # Dump MISCOUT Register
  3870. DIR,RUN,MISC_WRITE,0xef
  3871. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3872. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3873. CLK_IND, RUN, FREQ_2, 0x3a
  3874. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3875. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3876. CRT,RUN,LATCH_DATA, 0x00
  3877.  
  3878.  
  3879. [640,480,24,37,72]
  3880. # Unlock CRTC
  3881. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3882. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3883. CRT,RUN,REG_LOCK_1,0x48,0xa0
  3884. # Dump CRT Controller Registers
  3885. CRT,RUN,HORZ_TOTAL,0x49,0x3b,0x3c,0x8d,0x3e,0x02,0x06,0x3e,0x00,0x40
  3886. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3887. CRT,RUN,VERT_RETRACE_START,0xe8,0x0b,0xdf
  3888. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x06,0xab,0xff
  3889. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  3890. CRT,RUN,MISC_1,0x15,0x43,0x24,0x11
  3891. CRT,RUN,MODE_CONTROL,0x02
  3892. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3893. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  3894. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3895. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3896. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3897. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  3898. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3899. # Lock CRTC Reg 11 for compatibility
  3900. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3901. # Dump ENG Register
  3902. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3903. # Dump MISCOUT Register
  3904. DIR,RUN,MISC_WRITE,0xef
  3905. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3906. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3907. CLK_IND, RUN, FREQ_2, 0x3a
  3908. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3909. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3910. CRT,RUN,LATCH_DATA, 0x00
  3911.  
  3912. [640,480,24,31,60]
  3913. # Unlock CRTC
  3914. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3915. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3916. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3917. # Dump CRT Controller Registers
  3918. CRT,RUN,HORZ_TOTAL,0x46,0x3b,0x3c,0x8a,0x3d,0x06,0x0b,0x3e,0x00,0x40
  3919. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3920. CRT,RUN,VERT_RETRACE_START,0xe9,0x0b,0xdf
  3921. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0b,0xab,0xff
  3922. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  3923. CRT,RUN,MISC_1,0x15,0x41,0x24,0x11
  3924. CRT,RUN,MODE_CONTROL,0x02
  3925. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3926. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  3927. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3928. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3929. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3930. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  3931. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3932. # Lock CRTC Reg 11 for compatibility
  3933. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3934. # Dump ENG Register
  3935. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3936. # Dump MISCOUT Register
  3937. DIR,RUN,MISC_WRITE,0xef
  3938. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3939. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3940. CLK_IND, RUN, FREQ_2, 0x21
  3941. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3942. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3943. CRT,RUN,LATCH_DATA, 0x00
  3944.  
  3945. [640,480,16,64,120]
  3946. # Unlock CRTC
  3947. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3948. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3949. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3950. # Dump CRT Controller Registers
  3951. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x12,0x29,0x0f,0x14,0x3e,0x00,0x40
  3952. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3953. CRT,RUN,VERT_RETRACE_START,0xef,0x0c,0xdf
  3954. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0e,0xab,0xff
  3955. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3956. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  3957. CRT,RUN,MODE_CONTROL,0x02
  3958. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3959. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  3960. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3961. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3962. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3963. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3964. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3965. # Lock CRTC Reg 11 for compatibility
  3966. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3967. # Dump ENG Register
  3968. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3969. # Dump MISCOUT Register
  3970. DIR,RUN,MISC_WRITE,0xef
  3971. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3972. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3973. CLK_IND, RUN, FREQ_2, 0x67
  3974. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3975. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3976. CRT,RUN,LATCH_DATA, 0x00
  3977.  
  3978. [640,480,16,52,100]
  3979. # Unlock CRTC
  3980. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3981. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3982. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3983. # Dump CRT Controller Registers
  3984. CRT,RUN,HORZ_TOTAL,0x2d,0x27,0x28,0x10,0x29,0x0f,0x05,0x3e,0x00,0x40
  3985. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3986. CRT,RUN,VERT_RETRACE_START,0xec,0x01,0xdf
  3987. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0xff,0xab,0xff
  3988. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3989. CRT,RUN,MISC_1,0x15,0x28,0x16,0x11
  3990. CRT,RUN,MODE_CONTROL,0x02
  3991. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3992. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  3993. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3994. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3995. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3996. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3997. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3998. # Lock CRTC Reg 11 for compatibility
  3999. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  4000. # Dump ENG Register
  4001. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  4002. # Dump MISCOUT Register
  4003. DIR,RUN,MISC_WRITE,0xef
  4004. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  4005. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  4006. CLK_IND, RUN, FREQ_2, 0x50
  4007. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  4008. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  4009. CRT,RUN,LATCH_DATA, 0x00
  4010.  
  4011. [640,480,16,48,90]
  4012. # Unlock CRTC
  4013. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  4014. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  4015. CRT,RUN,REG_LOCK_1,0x48,0xa5
  4016. # Dump CRT Controller Registers
  4017. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x12,0x29,0x0f,0x14,0x3e,0x00,0x40
  4018. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  4019. CRT,RUN,VERT_RETRACE_START,0xf7,0x01,0xdf
  4020. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x12,0xab,0xff
  4021. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  4022. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  4023. CRT,RUN,MODE_CONTROL,0x02
  4024. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  4025. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  4026. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  4027. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  4028. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  4029. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  4030. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  4031. # Lock CRTC Reg 11 for compatibility
  4032. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  4033. # Dump ENG Register
  4034. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  4035. # Dump MISCOUT Register
  4036. DIR,RUN,MISC_WRITE,0xef
  4037. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  4038. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  4039. CLK_IND, RUN, FREQ_2, 0x4d
  4040. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  4041. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  4042. CRT,RUN,LATCH_DATA, 0x00
  4043.  
  4044. [640,480,16,37,75]
  4045. # Unlock CRTC
  4046. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  4047. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  4048. CRT,RUN,REG_LOCK_1,0x48,0xa5
  4049. # Dump CRT Controller Registers
  4050. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x13,0x29,0x0d,0xf6,0x1f,0x00,0x40
  4051. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  4052. CRT,RUN,VERT_RETRACE_START,0xe0,0x03,0xdf
  4053. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0xf6,0xab,0xff
  4054. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  4055. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  4056. CRT,RUN,MODE_CONTROL,0x02
  4057. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  4058. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  4059. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  4060. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  4061. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  4062. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  4063. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  4064. # Lock CRTC Reg 11 for compatibility
  4065. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  4066. # Dump ENG Register
  4067. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  4068. # Dump MISCOUT Register
  4069. DIR,RUN,MISC_WRITE,0xef
  4070. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  4071. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  4072. CLK_IND, RUN, FREQ_2, 0x3a
  4073. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  4074. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  4075. CRT,RUN,LATCH_DATA, 0x00
  4076.  
  4077. [640,480,16,37,72]
  4078. # Unlock CRTC
  4079. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  4080. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  4081. CRT,RUN,REG_LOCK_1,0x48,0xa5
  4082. # Dump CRT Controller Registers
  4083. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x13,0x29,0x0c,0x06,0x3e,0x00,0x40
  4084. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  4085. CRT,RUN,VERT_RETRACE_START,0xe8,0x0b,0xdf
  4086. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x06,0xab,0xff
  4087. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  4088. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  4089. CRT,RUN,MODE_CONTROL,0x02
  4090. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  4091. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  4092. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  4093. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  4094. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  4095. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  4096. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  4097. # Lock CRTC Reg 11 for compatibility
  4098. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  4099. # Dump ENG Register
  4100. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  4101. # Dump MISCOUT Register
  4102. DIR,RUN,MISC_WRITE,0xef
  4103. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  4104. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  4105. CLK_IND, RUN, FREQ_2, 0x3a
  4106. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  4107. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  4108. CRT,RUN,LATCH_DATA, 0x00
  4109.  
  4110. [640,480,16,31,60]
  4111. # Unlock CRTC
  4112. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  4113. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  4114. CRT,RUN,REG_LOCK_1,0x48,0xA5
  4115. # Dump CRT Controller Registers
  4116. CRT,RUN,HORZ_TOTAL,0x2d,0x27,0x28,0x10,0x29,0x0f,0x0b,0x3e,0x00,0x40
  4117. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  4118. CRT,RUN,VERT_RETRACE_START,0xe9,0x0b,0xdf
  4119. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0b,0xab,0xff
  4120. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  4121. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  4122. CRT,RUN,MODE_CONTROL,0x02
  4123. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  4124. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  4125. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  4126. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  4127. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  4128. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  4129. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  4130. # Lock CRTC Reg 11 for compatibility
  4131. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  4132. # Dump ENG Register
  4133. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  4134. # Dump MISCOUT Register
  4135. DIR,RUN,MISC_WRITE,0xef
  4136. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  4137. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  4138. CLK_IND, RUN, FREQ_2, 0x21
  4139. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  4140. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  4141. CRT,RUN,LATCH_DATA, 0x00
  4142.  
  4143. [640,480,8,64,120]
  4144. # Unlock CRTC
  4145. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  4146. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  4147. CRT,RUN,REG_LOCK_1,0x48,0xa5
  4148. # Dump CRT Controller Registers
  4149. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x12,0x29,0x0f,0x14,0x3e,0x00,0x40
  4150. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  4151. CRT,RUN,VERT_RETRACE_START,0xef,0x0c,0xdf
  4152. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0e,0xab,0xff
  4153. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  4154. CRT,RUN,MISC_1,0x15,0x2a,0x40,0x11
  4155. CRT,RUN,MODE_CONTROL,0x02
  4156. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  4157. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  4158. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  4159. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  4160. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  4161. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  4162. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  4163. # Lock CRTC Reg 11 for compatibility
  4164. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  4165. # Dump ENG Register
  4166. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  4167. # Dump MISCOUT Register
  4168. DIR,RUN,MISC_WRITE,0xef
  4169. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  4170. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  4171. CLK_IND, RUN, FREQ_2, 0x67
  4172. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  4173. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  4174. CRT,RUN,LATCH_DATA, 0x08
  4175.  
  4176. [640,480,8,52,100]
  4177. # Unlock CRTC
  4178. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  4179. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  4180. CRT,RUN,REG_LOCK_1,0x48,0xa5
  4181. # Dump CRT Controller Registers
  4182. CRT,RUN,HORZ_TOTAL,0x2d,0x27,0x28,0x10,0x29,0x0f,0x05,0x3e,0x00,0x40
  4183. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  4184. CRT,RUN,VERT_RETRACE_START,0xec,0x01,0xdf
  4185. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0xff,0xab,0xff
  4186. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  4187. CRT,RUN,MISC_1,0x15,0x28,0x40,0x11
  4188. CRT,RUN,MODE_CONTROL,0x02
  4189. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  4190. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  4191. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  4192. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  4193. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  4194. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  4195. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  4196. # Lock CRTC Reg 11 for compatibility
  4197. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  4198. # Dump ENG Register
  4199. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  4200. # Dump MISCOUT Register
  4201. DIR,RUN,MISC_WRITE,0xef
  4202. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  4203. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  4204. CLK_IND, RUN, FREQ_2, 0x50
  4205. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  4206. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  4207. CRT,RUN,LATCH_DATA, 0x08
  4208.  
  4209. [640,480,8,48,90]
  4210. # Unlock CRTC
  4211. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  4212. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  4213. CRT,RUN,REG_LOCK_1,0x48,0xa5
  4214. # Dump CRT Controller Registers
  4215. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x12,0x29,0x0f,0x14,0x3e,0x00,0x40
  4216. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  4217. CRT,RUN,VERT_RETRACE_START,0xf7,0x01,0xdf
  4218. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x12,0xab,0xff
  4219. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  4220. CRT,RUN,MISC_1,0x15,0x2a,0x40,0x11
  4221. CRT,RUN,MODE_CONTROL,0x02
  4222. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  4223. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  4224. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  4225. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  4226. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  4227. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  4228. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  4229. # Lock CRTC Reg 11 for compatibility
  4230. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  4231. # Dump ENG Register
  4232. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  4233. # Dump MISCOUT Register
  4234. DIR,RUN,MISC_WRITE,0xef
  4235. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  4236. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  4237. CLK_IND, RUN, FREQ_2, 0x4d
  4238. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  4239. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  4240. CRT,RUN,LATCH_DATA, 0x08
  4241.  
  4242. [640,480,8,37,75]
  4243. # Unlock CRTC
  4244. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  4245. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  4246. CRT,RUN,REG_LOCK_1,0x48,0xa5
  4247. # Dump CRT Controller Registers
  4248. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x13,0x29,0x0d,0xf6,0x1f,0x00,0x40
  4249. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  4250. CRT,RUN,VERT_RETRACE_START,0xe0,0x03,0xdf
  4251. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0xf6,0xab,0xff
  4252. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  4253. CRT,RUN,MISC_1,0x15,0x2a,0x40,0x11
  4254. CRT,RUN,MODE_CONTROL,0x02
  4255. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  4256. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  4257. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  4258. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  4259. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  4260. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  4261. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  4262. # Lock CRTC Reg 11 for compatibility
  4263. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  4264. # Dump ENG Register
  4265. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  4266. # Dump MISCOUT Register
  4267. DIR,RUN,MISC_WRITE,0xef
  4268. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  4269. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  4270. CLK_IND, RUN, FREQ_2, 0x3a
  4271. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  4272. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  4273. CRT,RUN,LATCH_DATA, 0x08
  4274.  
  4275. [640,480,8,37,72]
  4276. # Unlock CRTC
  4277. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  4278. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  4279. CRT,RUN,REG_LOCK_1,0x48,0xa5
  4280. # Dump CRT Controller Registers
  4281. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x13,0x29,0x0c,0x06,0x3e,0x00,0x40
  4282. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  4283. CRT,RUN,VERT_RETRACE_START,0xe8,0x0b,0xdf
  4284. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x06,0xab,0xff
  4285. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  4286. CRT,RUN,MISC_1,0x15,0x2a,0x40,0x11
  4287. CRT,RUN,MODE_CONTROL,0x02
  4288. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  4289. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  4290. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  4291. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  4292. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  4293. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  4294. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  4295. # Lock CRTC Reg 11 for compatibility
  4296. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  4297. # Dump ENG Register
  4298. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  4299. # Dump MISCOUT Register
  4300. DIR,RUN,MISC_WRITE,0xef
  4301. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  4302. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  4303. CLK_IND, RUN, FREQ_2, 0x3a
  4304. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  4305. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  4306. CRT,RUN,LATCH_DATA, 0x08
  4307.  
  4308. [640,480,8,31,60]
  4309. # Unlock CRTC
  4310. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  4311. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  4312. CRT,RUN,REG_LOCK_1,0x48,0xA5
  4313. # Dump CRT Controller Registers
  4314. CRT,RUN,HORZ_TOTAL,0x2d,0x27,0x28,0x10,0x29,0x0f,0x0b,0x3e,0x00,0x40
  4315. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  4316. CRT,RUN,VERT_RETRACE_START,0xe9,0x0b,0xdf
  4317. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0b,0xab,0xff
  4318. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  4319. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  4320. CRT,RUN,MODE_CONTROL,0x02
  4321. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  4322. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  4323. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  4324. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  4325. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  4326. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  4327. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  4328. # Lock CRTC Reg 11 for compatibility
  4329. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  4330. # Dump ENG Register
  4331. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  4332. # Dump MISCOUT Register
  4333. DIR,RUN,MISC_WRITE,0xef
  4334. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  4335. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  4336. CLK_IND, RUN, FREQ_2, 0x21
  4337. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  4338. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  4339. CRT,RUN,LATCH_DATA, 0x08
  4340.  
  4341.  
  4342.  
  4343.  
  4344.  
  4345.  
  4346.